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1 Lab Appendix Exercises For A Computer Architecture Course A1.1 Introduction This Appendix presents a set of lab exercises for an undergraduate computer architecture course. The labs are designed for students whose primary educational goal is learning how to build software, not hardware. Consequently, after a few weeks of introduction to digital circuits, the labs shift emphasis to programming. The facilities...
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Lab Appendix Exercises For A Computer Architecture Course
A1.1 Introduction
This Appendix presents a set of lab exercises for an undergraduate computer architecture course. The labs are designed for students whose primary educational goal is learning how to build software, not hardware. Consequently, after a few weeks of introduction to digital circuits, the labs shift emphasis to programming. The facilities required for the lab are minimal: a small amount of hardware is needed for the early weeks, and access to computers running a version of the Unix operating system (e.g., Linux) is needed for later labs. A RISC architecture works best for the assembly language labs because instructors find that CISC architectures absorb arbitrary amounts o...
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Purdue - CS - 250
--Sec. A1.7Lab Exercises337Lab 1Introduction And Account ConfigurationPurposeTo learn about the lab and set up a computer account for use in lab during the semester.Background Reading And PreparationRead about the bash shell availabl
Purdue - CS - 250
--Sec. A1.7Lab Exercises337Lab 1Introduction And Account ConfigurationPurposeTo learn about the lab and set up a computer account for use in lab during the semester.Background Reading And PreparationRead about the bash shell availabl
Purdue - CS - 250
--Lab Exercises339Lab 2Digital Logic: Use Of A BreadboardPurposeTo learn how to wire a basic breadboard and use an LED to test the operation of a gate.Background Reading And PreparationRead Chapter 2 to learn about basic logic gates an
Purdue - CS - 250
--Lab Exercises339Lab 2Digital Logic: Use Of A BreadboardPurposeTo learn how to wire a basic breadboard and use an LED to test the operation of a gate.Background Reading And PreparationRead Chapter 2 to learn about basic logic gates an
Purdue - CS - 250
--Lab Exercises341Lab 3Digital Logic: Building An Adder From GatesPurposeTo learn how basic logic gates can be combined to perform complex tasks such as binary addition.Background Reading And PreparationRead Chapter 2 about basic logic
Purdue - CS - 250
--Lab Exercises341Lab 3Digital Logic: Building An Adder From GatesPurposeTo learn how basic logic gates can be combined to perform complex tasks such as binary addition.Background Reading And PreparationRead Chapter 2 about basic logic
Purdue - CS - 250
--Lab Exercises343Lab 4Digital Logic: Clocks And DemultiplexingPurposeTo understand how a clock controls a circuit and allows a series of events to occur.Background Reading And PreparationRead Chapter 2 to learn about basic logic gates
Purdue - CS - 250
--Lab Exercises343Lab 4Digital Logic: Clocks And DemultiplexingPurposeTo understand how a clock controls a circuit and allows a series of events to occur.Background Reading And PreparationRead Chapter 2 to learn about basic logic gates
Purdue - CS - 250
--Lab Exercises345Lab 5Representation: Testing Big Endian Vs. Little EndianPurposeTo learn how the integer representation used by the underlying hardware affects programming and data layout.Background Reading And PreparationRead Chapte
Purdue - CS - 250
--Lab Exercises345Lab 5Representation: Testing Big Endian Vs. Little EndianPurposeTo learn how the integer representation used by the underlying hardware affects programming and data layout.Background Reading And PreparationRead Chapte
Purdue - CS - 250
--Lab Exercises347Lab 6Representation: A Hex Dump Program In CPurposeTo learn how values in memory can be presented in hexadecimal form.Background Reading And PreparationRead Chapter 3 on data representation, and find both the integer
Purdue - CS - 250
--Lab Exercises347Lab 6Representation: A Hex Dump Program In CPurposeTo learn how values in memory can be presented in hexadecimal form.Background Reading And PreparationRead Chapter 3 on data representation, and find both the integer
Purdue - CS - 250
--Lab Exercises349Lab 7Processors: Learn A RISC Assembly LanguagePurposeTo gain first-hand experience with an assembly language and understand the oneto-one mapping between assembly language instructions and machine instructions.Backgro
Purdue - CS - 250
--Lab Exercises349Lab 7Processors: Learn A RISC Assembly LanguagePurposeTo gain first-hand experience with an assembly language and understand the oneto-one mapping between assembly language instructions and machine instructions.Backgro
Purdue - CS - 250
--Lab Exercises351Lab 8Processors: Function That Can Be Called From CPurposeTo learn how to write an assembly language function that can be called from a C program.Background Reading And PreparationRead Chapter 8 to learn about subrout
Purdue - CS - 250
--Lab Exercises351Lab 8Processors: Function That Can Be Called From CPurposeTo learn how to write an assembly language function that can be called from a C program.Background Reading And PreparationRead Chapter 8 to learn about subrout
Purdue - CS - 250
--Lab Exercises353Lab 9Memory: Row-Major And Column-Major Array StoragePurposeTo understand storage of arrays in memory and the difference between row-major order and column-major order.Background Reading And PreparationRead Chapters 9
Purdue - CS - 250
--Lab Exercises353Lab 9Memory: Row-Major And Column-Major Array StoragePurposeTo understand storage of arrays in memory and the difference between row-major order and column-major order.Background Reading And PreparationRead Chapters 9
Purdue - CS - 250
--Lab Exercises355Lab 10Input / Output: A Buffered I/O LibraryPurposeTo learn how buffered I/O operates and to compare the performance of buffered and unbuffered I/O.Background Reading And PreparationRead Chapters 13 through 15 to lear
Purdue - CS - 250
--Lab Exercises355Lab 10Input / Output: A Buffered I/O LibraryPurposeTo learn how buffered I/O operates and to compare the performance of buffered and unbuffered I/O.Background Reading And PreparationRead Chapters 13 through 15 to lear
Purdue - CS - 250
--Lab Exercises357Lab 11A Hex Dump Program In Assembly LanguagePurposeTo gain experience coding assembly language.Background Reading And PreparationReview Chapters 4 through 6, Chapter 8, and assembly language programs written in earli
Purdue - CS - 250
--Lab Exercises357Lab 11A Hex Dump Program In Assembly LanguagePurposeTo gain experience coding assembly language.Background Reading And PreparationReview Chapters 4 through 6, Chapter 8, and assembly language programs written in earli
Purdue - CS - 381
\Things to Know." Existential Quanti er: There exists an x such that P(x) is true. Universal Quanti er: Binomial Coe cient: Product: Sum: Logarithm De nition(9x)P (x) For all x, P(x) is true. (8x)P (x) The number of m-combinations of a set of n dist
Purdue - CS - 381
Solution to Homework 1Stirlings Approximation Part 1: logk k=1The graph at the back represents the above function. The graph does not look much like a logarithmic curve. Looks more like nlogn. Plotting the curve for nlogn gives a good approximati
Purdue - CS - 381
Homework #2Problem 1:Prove that:n k1 1) 1 k (k11 n1Proving for basis: Put k = 1 in L.H.S:k = 1 and n = 11 1(1 1)Put n = 1 in R.H.S:1 2 1 211 11L.H.S = R.H.S , hence true for basis. Assume true for n and prove for n + 1,n1 k
Purdue - CS - 381
1)nln n or ln nn both take ln ln nln n = ln n * ln n = (ln n)2 ln lnn = n (ln ln n) ( ln n )2 n n ( ln ln n ) ( ln n )2 lim n n ( ln ln n ) lim lim ( t2 ) t t ( e ln t )2t = lim t t t e / t + e ln t( 2t ) 2 =lim t t ( e ln t +t e/ e / t +
Purdue - CS - 381
1. T (n) = 3T (n 1) + 2 = 3(3T (n 2) + 2) + 2 = 3 2 T (n 2) + 3 2 + 2 = 3 2 (3T (n 3) + 2) + 3 2 + 2 = 33 T (n 3) + 3 2 2 + 3 2 + 2 This can be generalized to: T ( n) = 3 i T ( n i ) + 2 3 jj =0 i 1This is trivially true for i = 1. Now s
Purdue - CS - 381
1.Divide-and-conquer, binary search, sorted array A, # of element is N. Basic idea : N Find middle element of array A with index ] . 2 3 case : N N case 1 : A ] =] 2 2 N case 2 : A ] < 2 N case 3 : A ] > 2 N ]2 N ]2 , find. Return 1. (found) N ]2 N
Purdue - CS - 381
1.Divide-and-conquer, binary search, sorted array A, # of element is N. Basic idea : N Find middle element of array A with index ] . 2 3 case : N case 1 : A ] 2 N case 2 : A ] 2 N =] 2 < N ]2 N ]2 , find. Return 1. (found) N ]2 N ]2, recursive on
Purdue - CS - 381
Homework 61. T = t1t 2 t 3 .t n P = p1 p 2 p3 . p m Simple solution : O(nm)time Try every t i as a starting po int .Efficient algorithm: For example: T=x y y x z xy y x y y x z \ | | | | comparison failed here. / P=x y y x yy z x yy xyy z | secon
Purdue - CS - 250
Basics Chapter 1 Introduction and OverviewCS250 - Part 11Dr. Rajesh Subramanyan, 2005Importance Of Architecture Why should software folks study hardware ? To write smaller, faster code, less prone to errors Appreciate relative cost of ope
Purdue - CS - 250
Basics Chapter 2 Digital LogicCS250 - Part 11Dr. Rajesh Subramanyan, 2005Topics Flip-Flops Binary Counters ClocksCS250 - Part 1Voltage And Current Transistor Logic Gates Symbols Used For Gates Interconnection Of Gates IC Chips Co
Purdue - CS - 250
Basics Chapter 3 Data And Program RepresentationCS250 - Part 11Dr. Rajesh Subramanyan, 2005Topics Binary Arithmetic Hexadecimal Notation Notation For Constants Character Sets Unsigned Integers, Overow, And Underow Bits, Bytes Byte Si
Purdue - CS - 250
Processors Chapter 4The Variety Of Processors And Computational EnginesCS250 - Part II1Dr. Rajesh Subramanyan, 2005Topics Coprocessors Microcontrollers Microsequencers Range Of Processors Hierarchical Structure And Computational En
Purdue - CS - 250
Processors Chapter 5 Processor Types And Instruction SetsCS250 - Part II1Dr. Rajesh Subramanyan, 2005Topics Instruction set and representation Opcodes, Operands and results Typical instruction format Variable-length vs xed-length ins
Purdue - CS - 250
Processors Chapter 6 Operand Addressing And Instruction RepresentationCS250 - Part II1Dr. Rajesh Subramanyan, 2005Topics Opearand Values Two Operands Per Instruction Three Operands Per Instruction One Operand Per Instruction Introductio
Purdue - CS - 250
Processors Chapter 6 CPUs: Microcode, Protection, And Processor ModesCS250 - Part II1Dr. Rajesh Subramanyan, 2005Topics Changing modes Privelage and protection Backward compatability Modes of execution CPU complexity A central processo
Purdue - CS - 250
Memories Chapter 9 Memory And StorageCS250 - Part III1Dr. Rajesh Subramanyan, 2005Topics Memory Volatility Key Aspects Of Memory Characteristics Of Memory Technologies Denition IntroductionMemory Access Paradigm: Random Or Sequentia
Purdue - CS - 250
Memories Chapter 10 Physical Memory And Physical AddressingCS250 - Part III1Dr. Rajesh Subramanyan, 2005Topics Memory Controllers Synchronized Memory Technologies Multiple Data Rate Memory Technologies Examples Of Memory Technologie
Purdue - CS - 250
Memories Chapter 11 Virtual Memory Technologies And Virtual AddressingCS250 - Part III1Dr. Rajesh Subramanyan, 2005Topics Virtual Memory Terminology Interface To Multiple Physical Memory Systems Example of a Virtual Memory System Add
Purdue - CS - 250
Memories Chapter 12 Caches And CachingCS250 - Part III1Dr. Rajesh Subramanyan, 2005Topics Terminology Locality of reference Best and worst case cache performance Importance of caching Examples of caching Characteristics of a cache Ke
Purdue - CS - 250
Input and Output Chapter 13 Input/Output Concepts And TerminologyCS250 - Part IV1Dr. Rajesh Subramanyan, 2005Topics Self-clocking Data Full-duplex and Half-duplex Interaction Data Transfer Serial and Parallel Data Transfers Control of
Purdue - CS - 250
Input and Output Chapter 14 Bus And Bus ArchitecturesCS250 - Part IV1Dr. Rajesh Subramanyan, 2005Topics Multiple Buses A Parallel, Passive Mechanism Physical Connections Bus Interface Denition of a Bus Processors, I/O devices, and Bu
Purdue - CS - 250
Input and Output Chapter 15 Programmed And Interrupt-Driven I/OCS250 - Part IV1Dr. Rajesh Subramanyan, 2005Topics Code for polling Control and status register Processor use and polling First, second, and third generation computers Po
Purdue - CS - 250
Input and Output Chapter 16 A Programmers View Of Devices, I/O, and Buffering.CS250 - Part V1Dr. Rajesh Subramanyan, 2005Topics Summary Denition of a device driver Device independence, encapsulation, and hiding Conceptual parts of a devi
Purdue - CS - 250
Advanced Topics Chapter 17 ParallelismCS250 - Part V1Dr. Rajesh Subramanyan, 2005Topics SIMD SISD Explicit Vs. Implicit Parallel Architectures Symmetric Vs. Asymmetric Fine Grain Vs Coarse-grain Microscopic Vs Macroscopic Characteriz
Purdue - CS - 250
Advanced Topics Chapter 18 PipeliningCS250 - Part V1Dr. Rajesh Subramanyan, 2005Topics Hardware Pipeline Instruction and Data Pipeline Hardware Pipeline and Performance Improvement Software Pipelining Software Pipeline Performance And
Purdue - CS - 250
Advanced Topics Chapter 19 Assessing PerformanceCS250 - Part V1Dr. Rajesh Subramanyan, 2005Topics Measures of Computational Power Integer and Floating Point Computation Application Specic Instruction Counts Standardized Benchmarks I/