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...Real EE345S: Time DSP Lab Tasks Objective: Lab 3: Digital Filters This lab deals with designing and implementing digital filters. The design will be done using Matlab (fdatool) and implementation will be done in the DSP. We will be designing both FIR (Finite Impulse Response) as well as IIR (Infinite impulse response) filters. Lab report points (expectations): All the expectations (points) for the lab report will be taken from the lab page. I will be referring to that page (and...
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Real EE345S: Time DSP Lab Tasks Objective: Lab 3: Digital Filters This lab deals with designing and implementing digital filters. The design will be done using Matlab (fdatool) and implementation will be done in the DSP. We will be designing both FIR (Finite Impulse Response) as well as IIR (Infinite impulse response) filters. Lab report points (expectations): All the expectations (points) for the lab report will be taken from the lab page. I will be referring to that page (and point) all along this document. Goto http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6713/lab3/i ndex.html and scroll all the way to the bottom to see the lab report points. For the lab report, please turn in all graphs, tables and a brief description of each graph / table, in addition to answering the questions for the lab report. WEEK 1: Task 1: DSK Magnitude Response Set the sampling frequency to 8kHz on the audio codec. Measure the amplitude response of the DSK board by applying a sine wave from the signal generator to the line input and loop samples internally in the DSP back to the line output. This means you will read both the channels and write back to both the channels. You can then measure the voltage of the output and divide it by the voltage of the signal you sent in. This is the gain. You can convert it to decibels (dB). Obtain the gain in dB at these following frequencies: 400 Hz, 500 Hz, 600 Hz, 700 Hz, 1 kHz, 1.5 kHz, 2 kHz, 2.5 kHz, 3 kHz, 3.5 kHz and 4 kHz. Task 2: FIR filter design Design a Remez exchange 25th order band pass filter. fs = sampling frequency = 8kHz. flow = low cut off frequency = 1kHz. fhigh = 2.5kHz. Use fdatool in Matlab. This is a FIR filter. Obtain and store the filter coefficients. We will be plotting a comparison of the theoretical and experimental magnitude response for the lab report. This is the first part of point #1 of lab report checklist available here: http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6713/lab3/i ndex.html Obtain the gain in dB for the theoretical plot from Matlab at these following frequencies: 400 Hz, 500 Hz, 600 Hz, 700 Hz, 1 kHz, 1.5 kHz, 2 kHz, 2.5 kHz, 3 kHz, 3.5 kHz and 4 kHz. Task 3: FIR filter implementation Write a circular convolution function. The function will be called convolve. The following will be the function prototype to be used. Please do not change this as we will be comparing this C function with the assembly convolve function (This is already available for use). Prototype: float convolve (float *x, const float *h, const unsigned hlen, const unsigned xlen, const unsigned newest). Karthik Raghavan Page 1 2/19/2009 EE345S: Real Time DSP Lab Tasks Lab 3: Digital Filters Here x is the circular buffer, h is the filter coefficient array, hlen is the length of the filter coefficient array (in words) = number of taps = filter order + 1, xlen is the length of the circular buffer array (in words), which is a power of 2, newest is the newest index. Modify labmain.c (use polling code). Take the general program flow from Slides 3-8, 3-9 and 3-10 from the lab s pdf file available here: http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6713/SLIDE S/filters.pdf o o o o The code should initialize the filter coefficients. The code should read from both the left channel and right channel, update the circular buffer (using only the left channel data) and update the newest index. The code should make a function call to the convolve function you wrote earlier. The code should output the result from the convolve function on the right channel and output the unfiltered input to the left channel. This way you can see both the input and output on the oscilloscope. To test the functionality of your code, feed different frequencies from the function generator to both the channels of your Line In. Feed the stereo output coming from the Line Out to the oscilloscope. If you set it up right, you should see the input on the left channel and the output on the right channel. Use the same frequencies from Task 1. Obtain Vout/Vin and convert it into decibels (dB). This is the second part of point #1 of lab report. Now, plot both the graphs on top of each other (Task 1 and Task 2). This compares the theoretical and the experimental magnitude plots. Karthik Raghavan Page 2 2/19/2009 EE345S: Real Time DSP Lab Tasks Lab 3: Digital Filters WEEK 2: Task 4: FIR filter profiling Now, we will profile the C function convolve you wrote and compare it to a pre-written convolve function in assembly. This answers point #2 of the lab report. Profile your C function convolve for No optimization, O1, O2 and O3 levels. Now, download convol1.sa and convolve.sa from this lab s webpage. Add each file to your project separately and comment out the C function you wrote. This assembly function has a very similar calling method. There is one small difference. You have to provide the circular buffer length in blocks . The definition of Nblock is as follows: o Circular buffer size (in words) is 2^{Nblock-1} Make sure to data align the circular buffer in memory. Take a look at the assembly code in each of the two files and tell your TA the difference in implementation between both. Now, profile this assembly function convolve for No optimization, O1, O2 and O3 levels. Present your findings in a table: Convolve using C Convolve using assembly I Convolve using assembly II Optimization level No opt O0 O1 O2 O3 Task 5: IIR filter design will We now move on to the IIR filter design and implementation. We will implement the same IIR filter using 2 different architectures: Type 1 Direct Form (DFI) and Type 2 Direct Form (DFII). First, design a 6th order IIR Butterworth band pass filter using fdatool. fs = sampling frequency = 8kHz. flow = low cut off frequency = 1kHz. fhigh = 2.5kHz Obtain and store the filter coefficients. We will be plotting a comparison of the theoretical and experimental magnitude responses (both DFI and DFII) for the lab report. This is the first part of point #6 of lab report checklist available here: http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6713/lab3/i ndex.html Obtain the gain in dB for the theoretical plot from Matlab at these following frequencies: Karthik Raghavan Page 3 2/19/2009 EE345S: Real Time DSP Lab Tasks Lab 3: Digital Filters 400 Hz, 500 Hz, 600 Hz, 700 Hz, 1 kHz, 1.5 kHz, 2 kHz, 2.5 kHz, 3 kHz, 3.5 kHz and 4 kHz. Task 6: IIR filter DFI implementation The general flow of the DFI is presented in slides 3-44, 3-45 and 3-46 of the pdf: http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6713/SLIDE S/filters.pdf Modify labmain.c like you did for the FIR filter. We will break up the entire filter into a cascade of biquads (2nd order sections). In our case, we will have three biquads in series. Write a generic biquad convolution function. This takes one biquad s filter coefficients and the input and computes the output for that particular biquad. Remember to scale (gain) your biquad output appropriately. The generic flow of the program will be similar to the FIR. o The code should initialize the filter coefficients for each biquad. o The code should read from both the left channel and right channel. o The code should make a function call to a biquad convolve function. This will done in a cascade (in a series fashion) for three biquads. o The code should output the result from the last convolve function on the right channel and output the unfiltered input to the left channel. This way you can see both the input and output on the oscilloscope. To test the functionality of your code, feed different frequencies from the function generator to both the channels of your Line In. Feed the stereo output coming from the Line Out to the oscilloscope. If you set it up right, you should see the input on the left channel and the output on the right channel. Use the same frequencies from Task 4. Obtain Vout/Vin and convert it into decibels (dB). This is the second part of point #6 of lab report. Though it is not mandatory to implement the coefficients and states of the biquad this way, it is strongly recommended to use a structure which stores the biquad coefficients and states as its data members. This will help passing of parameters back and forth function and make it easier to debug your code. Task 7: Profile the DFI biquad convolution Here, you will profile the DFI biquad convolution routine you just wrote for No Optimization, O1, O2 and O3 levels. Karthik Raghavan Page 4 2/19/2009 EE345S: Real Time DSP Lab Tasks Lab 3: Digital Filters WEEK 3: Task 8: IIR filter DFII implementation Repeat Task 5 for DFII implementation. The general flow of the DFII is presented in slides 3-48 and 3-49 of the pdf: http://users.ece.utexas.edu/~bevans/courses/realtime/lectures/laboratory/c6713/SLIDE S/filters.pdf Only the biquad convolution would change from what you had for Task 5. The rest of the code would be the same. To test the functionality of your code, feed different frequencies from the function generator to both the channels of your Line In. Feed the stereo output coming from the Line Out to the oscilloscope. If you set it up right, you should see the input on the left channel and the output on the right channel. Use the same frequencies from Task 4. Obtain Vout/Vin and convert it into decibels (dB). This is the third part of point #6 of lab report. Now, combine the dB plots from Task 4, Task 5 and Task 6 into one graph for your lab report. Task 9: Profile the DFII biquad convolution Here, you will profile the DFII biquad convolution routine you just wrote for No Optimization, O1, O2 and O3 levels. Present the data in the following format: Optimization level No opt O0 O1 O2 Biquad conv, DFI Biquad conv, DFII Karthik Raghavan Page 5 2/19/2009 EE345S: Real Time DSP Lab Tasks O3 Lab 3: Digital Filters Task 10: Using LabVIEW to plot magnitude and phase plots of the FIR filter Open rtdx.pjt in Code Composer Studio. This uses the same labmain.c as does codec.pjt. Use the code from Task 2 for the FIR filter. Goto www.ece.utexas.edu/~raghavan and download the lab3.vi and rename this as lab.vi and place it in the same folder as rtdx.pjt. Open this VI in LabVIEW, set the # samples to 4096. (You can try a smaller number like 1024 initially). Run the code. Wait for a couple of iterations. This would compile, build and run the code that is currently open in rtdx.pjt. You should be able to see the magnitude and phase plots show up. The phase response must be linear for this case. Task 11: Using LabVIEW to plot magnitude and phase plots of the IIR DFI filter Repeat Task 9 for IIR DFI filter. The magnitude and phase plots (along with the plot in Task 7) take care of points 6 and 7 of the lab report. Task 12: Misc. lab report questions Do not forget to answer the rest of the questions (Points 3, 4, 5, 8 and 9) of the lab report. Karthik Raghavan Page 6 2/19/2009
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Caribbean >> ECE >> 382 (Spring, 1997)
Given a structural lter description, create the most hardware-efcient lter architecture, while satisfying the real-time constraints. Existing Tools: HYPER - UC Berkeley FIR Compiler - Altera Cadence, Synopsys also have tools May 2, 2000 INPUTS: Real...
Caribbean >> ECE >> 382 (Spring, 1997)
FILTER SYNTHESIS USING FINE-GRAIN DATA-FLOW GRAPHS Waqas Akram, Cirrus Logic Inc., Austin, Texas Abstract: This project is concerned with nding ways to synthesize hardware-efcient digital lters given technology and data rate constraints. The synthesi...
Caribbean >> ECE >> 382 (Spring, 1997)
Implementation of Process Networks in Java Arnab Basu & H.P. Vijay Kishen Process Networks Concurrent computation model, excellent for use in Computation Intensive Real time applications in Signal and Image processing. Kahn PN Represented as Direc...
Caribbean >> ECE >> 382 (Spring, 1997)
An Implementation of Process Networks in Java by Arnab Basu and H.P. Vijay Kishen Literature Survey Embedded Software Systems (EE382C) Abstract Process networks are networks of sequential processes connected by channels behaving like FIFO queues. ...
Caribbean >> ECE >> 382 (Spring, 1997)
IMPLEMENTATION OF PROCESS NETWORKS IN JAVA Arnab Basu Vijay Kishen EE382C-9 Embedded Software Systems Instructor: Dr Brian Evans University of Texas at Austin Project Goals z Design and Implementation of a PN Framework z Deadlock Detection and Reso...
Caribbean >> ECE >> 382 (Spring, 1997)
Final Report On IMPLEMENTATION OF PROCESS NETWORK IN JAVA Arnab Basu And Hampapur P. Vijay Kishen For EE382C Embedded Software Systems May 2000 ABSTRACT Process networks are networks of sequential processes connected by channels behaving like F...
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