Operational Chapter12 Amplifier Applications
Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock
Chap 12 - 1
Chapter Goals
Continue study of methods to determine transfer functions of circuits containing op amps. Study non-ideal op amp behavior. Demonstrate circuit analysis techniques for ideal and nonideal op amps. Learns factors involved in circuit design using op amps. Understand frequency response limitations of op amp circuits. Model amplifier limitations due to limited bandwidth and slew rate of the op amp. Perform SPICE simulation of nonideal op amp circuits.
Chap 12 - 2
Non-ideal Operational Amplifier
Various error terms arise in practical operational amplifiers due to non-ideal behavior. Some of the non-ideal characteristics include:
Finite open-loop gain that causes gain error Nonzero output resistance Finite input resistance Finite CMRR Common-mode input resistance DC error sources Output voltage and current limits
Chap 11-3
Finite Open-loop Gain
vo = Av = A(vs v ) = A(vs vo ) 1 id vo A Av = = v s 1+ A A is called loop gain. For A >>1, R 1 A = = 1+ 2 ideal R 1 v = vs v = vs vo 1 id v A = vs vs = s 1 + A 1 + A No longer zero, vid is small for large A.
Chap 11-4
R 1 v = v v= o 1 R +R o 12 R 1 = is called feedback R +R factor. 12
Gain Error
Gain Error is given by GE= (ideal gain)-(actual gain) For non-inverting amplifier,
GE = 1 A 1 = 1+ A (1+ A )
Gain error is also expressed as a fractional or percentage error. 1 A
1 1 FGE = 1+ A = 1 1 + A A
Chap 11-5
Gain Error: Example
Problem: Find ideal and actual gain and gain error is percent Given data: Closed-loop gain of 200 (46 dB), open-loop gain of op amp is 10,000 (80 dB). Approach:Amplifier is designed to give ideal gain and deviations from ideal case are determined. Hence, = 1 . 200 R1 and R2 arent designed to compensate for finite open-loop gain of amplifier. A 104 Av = = = 196 Analysis: 4 1 + A 10 1+ 200 200 196 FGE = = 0.02 200
Chap 11-6
Nonzero Output Resistance
Output terminal is driven by test source vx and current ix is calculated to determine output resistance (all independent sources are turned off).The equivalent circuit is same For both inverting and non-inverting amplifiers.
Rout = ix
vx
Chap 11-7
Nonzero Output Resistance (contd.)
Analysis: ix = io + i 2 io = Also, vid= -v1 and v x - Av vx i= 2 R +R Ro 12 R 1 v = v v= x 1 R +R x 12 i x 1 + A 1 1 = = + R vx Ro R +R out 12 id Thus, shunt feedback at output reduces Rout. If A is infinite, Rout=0
Chap 11-8
Rout =
Ro R + R 1 + A 1 2
R Rout o Since, Ro/(1+A)<<(R1+R2), 1+ A
Open-loop Gain Design: Example
Problem: Design non-inverting amplifier and find open-loop gain Given Data: Av=35 dB, Rout =0.2, Ro = 250 Analysis:
Av =1035dB / 20dB = 56.2
= 1 = 1 Av 56.2
Ro Rout = 0.2 1+ A
1 Ro = 56.2 250 1 = 7.03104 = 96.9dB A 1 R 0.2 out
Chap 11-9
Finite Input Resistance: Non-inverting Amplifier
Assuming i-<<i2 implies i1 = i2. R 1 v =v v o 1 R +R o 12 =(Av )= A(v x v ) 1 id A v= v 1 1+ A x A vx vx vx 1+ A ix = = R (1+ A)R id id R = R (1+ A) in id
Chap 11-10
Test voltage source vx is applied to input and current ix is calculated. vx v 1 v =i R i R ix = 1 11 21 R id
Finite Input Resistance: Inverting Amplifier
R1 removed
v x i x R1 + v R= = = R + vin ix 1 ix ix v v v v v Av 1 + 1 o= 1 + 1 1 i = i- + i = 1 2R R R R 2 2 id id
i 1 1+ A 1 G = v = + 1 1R R 2 id R R 2 R + 2 R =R +R in 1 id 1+ A 1 1+ A
For large A, Rin= R1
Chap 11-11
Finite Common-Mode Rejection Ratio (CMRR)
A real amplifier responds to signal common to both inputs, called commonmode input voltage. In general, v +v vo = A(v v ) + Acm 1 2 12 2 = A(v ) + Acm (v ) ic id
Chap 11-12
Finite Common-Mode Rejection Ratio CMRR (contd.)
v v = v + id 1 ic 2
v v = v id 2 ic 2
Ideal amplifier has Acm = 0, but for a real amplifier, Acm v v ic = A v + ic vo = A v + id id A CMRR
A(or Adm)= differential-mode gain Acm = common-mode gain vid = differential-mode input voltage vic = common-mode input voltage
CMRR = A Acm Actual sign of CMRR isnt known before hand as only lower bound is given.
Chap 11-13
Finite Common-Mode Rejection Ratio: Example
Problem: Find error introduced by finite CMRR. Given Data: A=2500, CMRR=80 dB, v1 =5.001 V, v2 =4.999 V Assumptions: Op amp is ideal except for finite gain and CMRR. Here, CMRR of 80 dB corresponds to CMRR of 104. Assume CMRR=+ 104 Analysis:
v = 5.001V 4.999V id v = 5.001V + 4.999V = 5.000V ic 2 v ic = 2500 0.002 + 5.000 V = 6.25V v = A v + ic id CMRR 104
Error introduced by common-mode input is 25% of differential input voltage. A 2500 Also, A= = = 0.25 = 12dB
cm
CMRR 10000
Chap 11-14
Voltage Follower Gain Error due to CMRR
Ideal gain for voltage follower is unity, gain error A 1 2CMRR GE = 1 Av = 1 1+ A1 2CMRR Since, both A and CMRR are normally >>1, 1 1 GE A CMRR First term is due to finite amplifier gain, second term shows that CMRR may introduce an even larger error.
Chap 11-15
v = vs vo id
v= ic
vs + v o 2
(v + v ) vo = A (vs vo ) + s o 2CMRR 1 A1+ vo 2CMRR Av = = 1 vs 1+ A1 2CMRR
Common-mode Input Resistance
When a pure common-mode signal vic is applied to amplifier input(vid =0), total resistance presented to source is 2Ric 2Ric = Ric. Ric is common-mode input resistance. Normally, Ric >> Rid. R = R 4R For a purely differential-mode input signal, input resistance is in id ic
Chap 11-16
DC Error Sources: Input-Offset Voltage
With inputs being zero, the amplifier output rests at some dc voltage level instead of zero. The equivalent dc input offset voltage is V V =o OS A The amplifier is connected as voltage-follower to give output voltage equal to offset voltage. To include effect of offset voltage, v ic +V vo = A v + OS id CMRR If vid =0, v ic +V = A(v ) vo = A OS CMRR OS v CMRR = v ic V/V OS Thus, CMRR is a measure of how total offset voltage changes from its dc value when common-mode voltage is applied.
Chap 11-17
DC Error Sources: Input-Offset Voltage (Example)
Output voltage is given by 99k V 1+ (0.003) = 0.25V OS 1.2k
Problem: Find quiescent dc voltage at output. Given data: R1 =1.2 k, R2 = 99 k , VOS 3mV Assumptions: Ideal op amp except for nonzero offset voltage.
Actual sign of VOS is unknown as only upper bound is given. Note: Offset voltage of most IC op amps can be manually adjusted by adding a potentiometer as shown.
Chap 11-18
DC Error Sources: Power Supply Rejection Ratio (PSRR)
Power supply voltages change due to long-term drift or noise on supplies. Equivalent input offset voltage changes in response to power supply voltage changes. PSRR measures the ability of amplifier to reject power supply variations. PSRR indicates how offset voltage changes in response to change in power supply voltages.
PSRR+ = v v PSRR = v v
OS
CC
OS
EE
Generally PSRR values for v+ and v- are different. Both CMRR and PSRR fall rapidly with frequency increase.
Chap 11-19
DC Error Sources: Input-Bias and Offset Currents
Bias currents IB1 and IB2 ( base currents in BJTs or gate currents in MOSFETs or JFETs) are similar in value with directions depending on internal amplifier circuit type. I =I I OS B1 B2 Sign of offset current is unknown as only upper bound is given.
In inverting amplifier shown, IB1 shorted out by ground connection. Since,inverting input is at virtual ground, amplifier output is forced to supply IB2 through R2 . Vo = I R B2 2
Chap 11-20
DC Error Sources: Input-Bias and Offset Currents - Bias Current Compensation
By superposition, R VoT = I R I R 1+ 2 B2 2 B1 B R 1 = (I I )R = I R B2 B1 2 OS 2
RR if RB = 1 2 . R +R 1 2
Bias current compensation resistor RB is used in series with non-inverting input. Output due to IB1 alone is R Vo = I R 1+ 2 B1 B R 1
Since, offset current is typically 5-10 times smaller than individual bias currents, dc output voltage error can be reduced by using bias compensation.
Chap 11-21
DC Error Sources: Input-Bias and Offset Currents - Errors in Integrator
At t=0, reset switch is opened, circuit starts integrating its own offset voltage and bias current. Using superposition analysis, V I vo(t) =V + OS t + B2 t OS RC C At t<0, reset switch is closed, circuit becomes a voltagefollower, Vo =V OS Output becomes ramp with slope determined by VOS and IB2 and saturates one at of the power supplies.
Chap 11-22
Output Voltage and Current Limits
Practical op amps have limited output voltage and current ranges. Voltage: Limited to several volts less than power supply span. Current: Limited by additional circuits (to limit power dissipation or protect against accidental short circuits). Current limit specified as minimum load resistance that the amplifier can drive with a given voltage swing. Eg: i = 10V = 2mA o 5k v vo v io = i + i = o + =o LFR R +R R L 21 EQ R = R (R + R ) EQ L 1 2 For inverting amplifier, R =R R EQ L 2
Chap 11-23
Output Voltage and Current Limits: Example
Assumptions: Ideal op amp except for limited output current. 10V Analysis: R =R R = 4k EQ L 2 2.5mA Since RL 5k R2 20k Since Av=20 dB, R 2 = 10 R 1 We choose R1 =10 k and R2 =100 k to provide an input resistance of 10 k. Maximum output current will be: 10V 10V io + = 2.1mA < 2.5mA 100k 5k
Chap 11-24
Problem: Design inverting amp with given specifications. Given Data: Av=20 dB, R 5k vo 10V L Magnitude of output current less than 2.5 mA.
Frequency Response of Op Amps: General Case
Op amps: Low-pass amplifier with high gain at dc and a single-pole frequency response. Ao A B= o T A(s) = s + s + B B Ao A B = oB A( j ) = 2 + 2 2 B 1+ 2 B B = open loop bandwidth of op amp. T = unity gain frequency or gain bandwidth product (frequency at which magnitude of gain is unity).
Ao T B At >>B, A( j ) =
At >>T, A( j ) = T = 1 A( j ) = T
At >>B,product of magnitude of amplifier gain and frequency is a constant value of unity gain frequency. Hence, T is also called gainbandwidth product.
Chap 11-25
Frequency Response of Op Amps: General Case (Example)
Ao = 1080dB/20dB = 104 =103rad/s B Ao 43 7 Av(s) = s + B = 10 10 = 10 B s +103 s +103 Frequency values are often expressed in Hz. f = B = 159Hz B 2 f = T = 1.59MHz T 2
Chap 11-26
Problem: Find transfer function describing frequencydependent amplifier voltage gain.
Frequency Response of Op Amps: Noninverting Amplifier
For a closed-loop feedback amplifier: Ao B Av(s) = A(s) = 1+ A(s) s + (1+ Ao ) B Ao 1+ Ao A (0) Av(s) = = sv s +1 +1 (1+ Ao ) B H = (1+ Ao ) = T H B Av (0) For Ao >>1, 1 H T Av (0) At low frequencies, gain is set by the feedback, but at high frequencies, it follows the gain of the amplifier.
Chap 11-27
Frequency Response of Op Amps: Noninverting Amplifier (Example)
Problem: Characterize frequency response of noninverting amplifier. Given data: Ao= 105= 100 dB, fT= 107 Hz, desired Av= 1000= 60 dB Assumptions: Amplifier is described by single-pole transfer function. 7 f Analysis: T = 10 Hz = 100Hz f= BA 105 o f = f (1+ Ao ) = 100(1+105103) = 10.1kHz H B = 1 = 1 = 103 Av (0) 1000 Ao 5 2 7 Op amp transfer Av (s) = s + B = 10 (2 )(10 ) = 2 10 B s + (2 )(102 ) s + 200 function Ao Noninverting amplifier 2 107 B Av (s) = = s + (1+ Ao ) s + 0.02 104 transfer function B
Chap 11-28
Frequency Response of Op Amps: Inverting Amplifier
R A(s) 2 Av(s) = R 1+ A(s) 1 R A Ao 2 o B R 1+ A R s + o B Av(s) = 2 = 1s R Ao B +1 1+ (1+ A ) 1 o s + B B R A R For Ao >>1, 2 o 2 R 1+A R o 1 T 1 = Av (s)= s s H T Ao +1 +1 1+ Ao H H
Chap 11-29
Frequency Response of Op Amps: Inverting Amplifier (Example)
Problem: Characterize frequency response of inverting amplifier. Given data: Ao= 2X105, fT= 5X105 Hz, desired Av=- 100= 40 dB Assumptions: Amplifier is described by single-pole transfer function. Analysis: f 5105 Hz f = T= = 2.5Hz BA 5 2 10 o 1 2 105 =1 f = f (1+ Ao ) = 2.5Hz(1+ ) = 4.95kHz = 1+ Av (0) 101 H B 101 Ao B = T = 5105(2 ) = 106 Op amp transfer Av (s) = s + s + B B s + (2 )(2.5) s + 5 function R Ao 9.90 105 Inverting amplifier 2 B Av (s) = = s + (1+ Ao ) s + 9.91103 transfer function R B 1
Chap 11-30
Frequency Response of Cascaded Amplifiers
Av (0) = A (0) A (0)... A (0) vN v1 v2 Bandwidth of the cascade amplifier is the frequency at which gain is reduced by -3 dB from its low frequency value. A (0) A (0)... A (0) vN v2 Av ( j ) = v1 H 2 For identical stages,
Assume that stages do not interact, V (s) V V V oN = o1 o2 ... oN Av (s) = Vs V V Vs(s) o1 o(N-1) = A (s) A (s)... A (s) vN v1 v2 A (0) A (0) A (0) v1 v2 Av (s) = ... vN s s s 1 + 1+ 1+ HN H1 H2
A (0) Av ( j ) = v1 H 2 = 21/ N 1 H H1 Chap 11-31
N
Frequency Response of Cascaded Amplifiers: Example
Problem: Calculate gain and bandwidth of a 2-stage amplifier with
500 A= v1 1+ s 2000 250 A= v 2 1+ s 4000
1.25105 Av ( j ) = 2 1+ 2 1+ 20002 40002
Approach: Av = Av1Av2. Find Av(0), apply definition of bandwidth to find fH.
Analysis: 125,000 Av (s) = s s 1+ 1+ 2000 4000 Av (0) = (500)(250) = 125,000 = 102dB
H is defined by A Av (0) 1.25105 A( j ) = mid = = H 2 2 2 2 1+ 2 = 2 1+ 20002 40002 f = 267Hz H Bandwidth of cascaded amplifier is lesser than that of individual stages.
Chap 11-32
Large Signal Limitations: Slew Rate and Full-Power Bandwidth
Slew rate: Maximum rate of change of voltage at output of op amp.Typical values range from 0.1V/s to 10V/s.
vo =V sint M dvo =V cost =V dt max M max M For no signal distortion, V SR M SR V M Full-power bandwidth is highest frequency at which a full-scale signal can be developed. SR f M 2V FS
Chap 11-33
For given frequency, slew rate limits maximum signal amplitude that can be amplified without distortion.
Operational Amplifier Macro Model for Frequency Response
Simplified circuit representations are available in most simulators to model terminal behavior of op amps that include all nonideal limitations of op amps and large number of parameters that can be adjusted to model op amp behavior. To model a single-pole roll-off, auxiliary dummy loop (voltage controlled voltage source v1 in series with R and C) is added to original 2-port. RC product chosen to give desired -3dB point for open loop amplifier.
Vo(s) Ao B Av (s) = = V (s) s + 1 B
=1 B RC
Chap 11-34
Op Amps For Lab
TLC27L2CP Single Supply Op Amp $.75 MC33078N Low Noise Op Amp $1.04
HSPICE Macro models
**StandardLinearIcsMacromodels,1993. **CONNECTIONS:
* TLC27L2 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT * CREATED USING PARTS RELEASE 4.03 ON 07/10/90 AT 15:01 * REV (N/A) SUPPLY VOLTAGE: 5V * CONNECTIONS: NON-INVERTING INPUT * | INVERTING INPUT * | | POSITIVE POWER SUPPLY * | | | NEGATIVE POWER SUPPLY * | | | | OUTPUT * ||||| .SUBCKT TLC27L2 1 2 3 4 5 * C1 11 12 10.12E-12 C2 6 7 15.00E-12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 4 3 DX EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5 FB 7 99 POLY(5) VB VC VE VLP VLN 0 419.1E6 -70E6 70E6 70E6 -70E6 GA 6 0 11 12 7.069E-6 GCM 0 6 10 99 282.0E-12 HLIM 90 0 VLIM 1K ISS 3 10 DC 450.0E-9 J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100.0E3 RD1 60 11 141.5E3 RD2 60 12 141.5E3 RO1 8 5 85 RO2 7 99 85 RP 3 4 523.6E3 RSS 10 99 444.4E6 VAD 60 4 -.5 VB 9 0 DC 0 VC 3 53 DC 1.470 VE 54 4 DC .57 VLIM 7 8 DC 0 VLP 91 0 DC 20 VLN 0 92 DC 20 .MODEL DX D(IS=800.0E-18) .MODEL JX PJF(IS=300.0E-15 BETA=222.1E-6 VTO=.027) .ENDS
*1INVERTINGINPUT *2NONINVERTINGINPUT *3OUTPUT *4POSITIVEPOWERSUPPLY *5NEGATIVEPOWERSUPPLY .SUBCKTMC3307813245(analog) ******************************************************** .MODELMDTHDIS=1E8KF=2.286238E16CJO=10F *INPUTSTAGE CIP251.200000E11 CIN151.200000E11 EIP105251 EIN165151 RIP10112.363636E+00 RIN15162.363636E+00 RIS11151.224040E+01 DIP1112MDTH400E12 DIN1514MDTH400E12 VOFP1213DC0 VOFN1314DC0 IPOL1351.100000E04 CPS11152.35E09 DINN1713MDTH400E12 VIN1751.000000e+00 DINR1518MDTH400E12 VIP4181.000000E+00 FCP45VOFP1.718182E+01 FCN54VOFN1.718182E+01 FIBP25VOFN4.545455E03 FIBN51VOFP4.545455E03 *AMPLIFYINGSTAGE FIP519VOFP9.545455E+02 FIN519VOFN9.545455E+02 CC19291.500000E08 HZTP3029VOFP1.523529E+02 HZTN530VOFN1.523529E+02 DOPM5122MDTH400E12 DONM2152MDTH400E12 HOPM2228VOUT5.172414E+03 VIPM2841.500000E+02 HONM2127VOUT4.054054E+03 VINM5271.500000E+02 DBIDON11953MDTH400E12 V151530.68 DBIDON25419MDTH400E12 V254520.68 RG115153.04E+05 RG125143.04E+05 RG215250.6072E+05 RG225240.6072E+05 E150405101E240395201 EDEC13839400.5 EDEC2038500.5 DOP5125MDTH400E12 VOP4251.474575E+00 DON2452MDTH400E12 VON2451.474575E+00 RAJUS5051E12 GCOMP54458.1566068E04 RPM15801E+06 RPM24801E+06 GAVPH58250803.26E03 RAVPHGH824613 RAVPHGB825613 RAVPHDH82831000 RAVPHDB82841000 CAVPHH4830.159E09 CAVPHB5840.159E09 EOUT26238251 VOUT2350 ROUT2634.780354E+01 COUT351.000000E12 .ENDS