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369-Spring ECE 2009 Instructor Name: Ali Akoglu Office: ECE 356-B Phone: (520) 626-5149 TR 0930AM - 1045AM M LNG 210 Teaching Assistant Chad Rossmeisl ECE250 TBA rossmeis@email.arizona.edu Wednesdays 1:00 PM - 3:00 PM Fridays 10:00 AM 12:00 PM or by appointment Email: akoglu@ece.arizona.edu Office Hours: Tuesdays 11:00 AM - 12:00 PM Thursdays 1:00 PM 2:00 PM or by appointment Textbook D. A. Patterson and J.L. Hennessy, Computer Organization and Design: The Hardware /Software Interface, 3rd Edition, Revised Printing, Morgan Kaufmann Publishers, 2007. Overall Educational Goal Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course qualitatively and quantitatively examines computer design trade-offs, teaches the fundamentals of computer architecture and organization, including CPU, memory, registers, arithmetic unit, control unit, and input/output components. Topics include reduced instruction set computer architectures (RISC), using the MIPS central processor as an example, interface between assembly and high level programming constructs and hardware, instruction and memory cache systems, performance evaluation, benchmarks, and use of the SPIM/WinDLX/Verilog Simulators for the MIPS architecture. ECE369 serves students two ways. For those who will continue in computer architecture, it lays foundation of state-of-the-art techniques implemented in current and future high-performance microprocessors. For those students not continuing in computer architecture, it gives an overview of the kind of techniques used in today's microprocessors. Prerequisite You must have the following background: ECE274 (Logic Design): Full Adder Design , Sequential Logic vs. Combinational Logic, Synchronous vs Asynchronous Circuits, Finite State Machine Design, Latches, Flip Flops (RS, D, etc) and their characteristics Programming in C Programming in Veriolg/VHDL Course outline Computer Abstractions and Technology Arithmetic for Computers Role of Performance Instruction Sets and Software Systems SPIM/WinDLX/Verilog Simulators MIPS CPU and Control Unit Organization Pipelining in MIPS CPU Exploiting Memory Hierarchy Philosophy "I never did anything by accident, nor did any of my inventions come by accident; they came by work." Thomas Alva Edison. Read before the class Participate and ask questions Manage your time (3 hours outside class for each credit hour) Start working on assignments early Outcomes Each one of you will soon have a degree from Electrical and Computer Engineering Department. You are getting closer to graduation. Believe me time passes very quickly. In the very near future you will have interviews for internships and then for full time jobs. May be you will apply for graduate schools. In my opinion ECE369 is a class that an Electrical and Computer Engineering student has to take to call him/herself as engineer. This class will be a big step into computer architecture world and we will build the fundamentals throughout this semester. My task is to convey the significance of this field to you and motivate you to computer explore architecture paradigm. By the end of the semester I want each one of you to have the ability to articulate the design issues involved in the computer architecture both in theoretical and application levels. I want you to reach a level of confidence where you can go for an interview and talk about design tradeoffs involved in computer design, issues in instruction set architecture, pipelining concepts, memory hierarchy and cache issues comfortably. Finally you should be able to apply the techniques you have learnt and analytical thinking skills you have gained throughout the computer architecture experience to other courses as well. Students with Disabilities If you anticipate the need for reasonable accommodations to meet the requirements of this course, you must register with the Disability Resource Center and request that the DRC send me official notification of your accommodation needs as soon as possible. Please plan to meet with me by appointment or during office hours to discuss accommodations and how my course requirements and activities may impact your ability to fully participate. General policies Course will have 8 to 12 assignments, 2 mid-term examinations, a final project, and a final comprehensive examination. NO LATE ASSIGNMENTS WILL BE ACCEPTED, except under extreme nonacademic circumstances discussed with the instructor at least one week before the assignment is due. Make-ups for assignments and exams may be arranged if a student's absence is caused by documented illness or personal emergency. A written explanation (including supporting documentation) must be submitted to your instructor; if the explanation is acceptable, an alternative to the graded activity will be arranged. When possible, makeup arrangements must be completed prior to the scheduled activity. Any extenuating circumstances that have an impact on your participation in the course should be discussed with your instructor as soon as those circumstances are known. Inquiries about graded material have to be turned in within 3 days of receiving a grade. Approximate weight of each assignment will be specified when the assignment is handed out. Assignments will be due in class on the due date. The instructor reserves the right to modify course policies, course calendar, assignment values and due dates, as circumstances require. Students are strongly encouraged to attend the class. Lecture notes are intended to serve as a supplement and not as a substitute for attending class. You are encouraged to discuss the assignment specifications with your instructor, your teaching assistant, and your fellow students. However, anything you submit for grading must be unique and should NOT be a duplicate of another source. The Department of Electrical and Computer Engineering expects all students to adhere to UofA's policies and procedures on Code of Academic Integrity. http://web.arizona.edu/~studpubs/policies/cacaint.htm Distribution of Components Grades Scale Component Assignments Midterm-I Midterm-II Percentage 15 15 15 Percentage 90-100% 80-89% 70-79% Grade A B C Project Final exam 30 25 60-69% Below 60% D E Final Exam: May 14, 2009- 8:00am-10:00am

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