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class_midterm
Course: AME 3623, Fall 2009School: Southern Oregon
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Word Count: 512
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Time Last Finite State Machine Examples Bit manipulation in C Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep 1 Today Midterm review One more Finite State Machine example Homework 2 Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep 2 Administrivia Midterm exam: next Tuesday Lab 2 due: one week from Thursday Labs 3 and 4 are posted on the class website Andrew H. Fagg: Embedded...
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Time
Last Finite State Machine Examples Bit manipulation in C
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
1
Today
Midterm review One more Finite State Machine example Homework 2
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
2
Administrivia
Midterm exam: next Tuesday Lab 2 due: one week from Thursday Labs 3 and 4 are posted on the class website
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
3
Midterm Preparation
Exam discussion on blackboard
Post sample questions (and answers) Some may appear on the exam
Look to homework assignments for the types of questions
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
4
Midterm Exam
No books No electronic devices You may bring 1 page of your own notes
Double-sided
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
5
Digital Logic
Basic gates
Truth table Symbols used in circuit diagrams NOT, AND, OR, NAND, NOR, XOR Tristate buffers Notation Precedence Basic laws: associative, distributive, commutative Demorgan's laws Basic identities
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep 6
Boolean algebra
Digital Logic
Digital circuits
Cascading basic gates Truth table to algebraic representation to circuit design Multiplexers, demultiplexers
Circuit reduction techniques
Algebraic manipulation Karnaugh maps
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep 7
Number Representations
Conversion between binary and:
Decimal Hexidecimal Octal
Unsigned vs signed numbers
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
8
Number Representations
Two's complement: Mechanism for representing both positive and negative numbers using a set of bits Taking the additive inverse of a number
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
9
Arithmetic
binary Adding/subtracting numbers Shifting left/right (multiplication/division by 2) Circuits that implement basic arithmetic operations
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
10
Sequential Logic
Notation
Timing diagrams
Flip flops (specifically, D)
Mechanism for implementing a memory Know the timing specification
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
11
Sequential Logic
Circuits with flip flops
Shifters Counters Memory
Sequential circuit design
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
12
Finite State Machines
Definition
States Events Transition function Outputs and output function
State transition diagrams Relationship to sequential logic FSMs for control
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep 13
An FSM Robot Control Example
Problem: A beacon can be located in front of, to the left, or to the right of the robot The robot must first find the beacon Then, the robot must move toward the beacon
Andrew H. Fagg: Embedded Real-Time Systems: Midterm Prep
14
Procedure: Turn...
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