from Review last lecture #1/3: The Cache Design Space
Several interacting dimensions
Cache Size Associativity
EECS 252 Graduate Computer Architecture Lec 5 Projects + Prerequisite Quiz
David Patterson
Electrical Engineering and Computer Sciences University of California, Berkeley http://www.eecs.berkeley.edu/~pattrsn http://www-inst.eecs.berkeley.edu/~cs252
cache size block size associativity replacement policy write-through vs write-back write allocation
The optimal choice is a compromise
depends on access characteristics workload use (I-cache, D-cache, TLB) depends on technology / cost
Bad
Factor A
Block Size
Simplicity often wins
Good
Factor B
Less
More
2/1/2006
CS252-s06, Lec 05-projects + prereq
2
Review from last lecture #2/3: Caches
The Principle of Locality:
Program access a relatively small portion of the address space at any instant of time. Temporal Locality: Locality in Time Spatial Locality: Locality in Space
Review from last lecture #3/3: TLB, Virtual Memory
Page tables map virtual address to physical address TLBs are important for fast translation TLB misses are significant in processor performance
funny times, as most systems cant access all of 2nd level cache without TLB misses!
Three Major Categories of Cache Misses:
Compulsory Misses: sad facts of life. Example: cold start misses. Capacity Misses: increase cache size Conflict Misses: increase cache size and/or associativity. Nightmare Scenario: ping pong effect!
Write Policy: Write Through vs. Write Back Today CPU time is a function of (ops, cache misses) vs. just f(ops): affects Compilers, Data structures, and Algorithms
Caches, TLBs, Virtual Memory all understood by examining how they deal with 4 questions: 1) Where can block...
Cs252s06-lec05-projects-prereq