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PRS02082005

Course: CS 2200, Fall 2008
School: Georgia Tech
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for PRS Kishore's lecture for Feb 8, 2005 Q1. (30 secs) A and B registers in the datapath of LC-2200-8 are there because 1. It is a good idea to buffer the inputs to the ALU 2. There is a single bus in the datapath 3. ALU is slow 4. These registers are needed in the instruction-set architecture This would be 5. Kishore knows his alphabets a good answer Q2. (30 sec) During the execution of BEQ instruction 1. The...

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for PRS Kishore's lecture for Feb 8, 2005 Q1. (30 secs) A and B registers in the datapath of LC-2200-8 are there because 1. It is a good idea to buffer the inputs to the ALU 2. There is a single bus in the datapath 3. ALU is slow 4. These registers are needed in the instruction-set architecture This would be 5. Kishore knows his alphabets a good answer Q2. (30 sec) During the execution of BEQ instruction 1. The branch target address calculation has to be done always 2. The branch target address calculation has to be done only if the operands are equal 3. The branch target address calculation has to be done only if the operands are unequal 4. What branch is target? 5. There are operands in BEQ? Q3. (30 sec) FSM 1. Is an abstract representation of the control unit of the processor 2. Is a particular instruction in the instruction-set of LC-2200 3. Is another name for ROM 4. Is another name for PLA 5. Is the way control bits are assigned in the words of the ROM 6. None of the above LdA 0 A LdB B LdC C Assume initially A = 32 B = ...

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