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sp07exam2a

Course: ECE 2030, Fall 2008
School: Georgia Tech
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2030 ECE -- Introduction to Computer Engineering February 26, 2007 EXAM #2 Page 1 of 5 Name: Student Number: 1. Check that your exam includes all 5 pages. 2. PRINT your name and student number in the spaces above. 3. Read all instructions and problems carefully. Points may be deducted for failure to follow instructions. 4. Show ALL of your work on these pages. If you need extra space for a particular problem,...

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2030 ECE -- Introduction to Computer Engineering February 26, 2007 EXAM #2 Page 1 of 5 Name: Student Number: 1. Check that your exam includes all 5 pages. 2. PRINT your name and student number in the spaces above. 3. Read all instructions and problems carefully. Points may be deducted for failure to follow instructions. 4. Show ALL of your work on these pages. If you need extra space for a particular problem, write on the back of the previous page. 5. You are NOT permitted to use notes, books, calculators, or other resources during this exam. 6. This exam lasts for 50 minutes. Point values are listed for each problem to assist you in best using your time. Problem 1. Problem 2. Problem 3. Problem 4. TOTAL. (10 points possible) (18 points possible) (12 points possible) (10 points possible) (50 points possible) ECE 2030 -- Introduction to Computer Engineering February 26, 2007 EXAM #2 Page 2 of 5 Problem 1. (10 points) A. (4 points) Given F(A, B, C) = m (0, 2, 4, 6, 7), express the function in algebraic sum-of-minterm and product-of-maxterm form. F(A, B, C) = (sum-of-minterms) F(A, B, C) = (product-of-maxterms) B. (4 points) Given the function G(A, B, C) defined by the Karnaugh map below, complete the truth table and the short-hand SOP and POS expressions for this function. AB C 00 01 11 10 0 1 0 0 1 1 1 0 1 0 A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 G G(A, B, C) = m ( G(A, B, C) = M ( ) ) C. (2 points) Complete the Karnaugh map for H(A, B, C, D) = M (0, 4, 5, 10, 15) + d(1, 2, 6, 8, 13) AB CD 00 00 01 11 10 01 11 10 ECE 2030 -- Introduction to Computer Engineering February 26, 2007 EXAM #2 Page 3 of 5 Problem 2. (18 points) For each part below, write both minimal sum-of-products (SOP) and minimal product-of-sums (POS) expressions for the function defined by the Karnaugh map. Circle the terms used in the Final SOP and Final POS maps. The K-map labeled work copy will not be graded. A. (8 points) CD AB 00 01 11 10 00 0 0 0 0 01 1 1 0 1 11 10 1 0 1 1 1 1 1 0 AB 00 01 11 10 CD 00 0 0 0 0 01 1 1 0 1 11 10 1 0 1 1 1 1 1 0 AB 00 01 11 10 CD 00 0 0 0 0 01 1 1 0 1 11 10 1 0 1 1 1 1 1 0 work copy F(A, B, C, D) = Number of essential prime implicants: F(A, B, C, D) = Number of essential prime implicates: B. (10 points) CD AB 00 01 11 10 00 1 1 1 0 01 1 0 x 1 11 10 x x 0 1 0 1 x x AB 00 01 11 10 CD 00 1 1 1 0 Final SOP Final POS (SOP) (POS) CD 01 1 0 x 1 11 10 x x 0 1 0 1 x x AB 00 01 11 10 00 1 1 1 0 01 1 0 x 1 11 10 x x 0 1 0 1 x x work copy G(A, B, C, D) = Number of essential prime implicants: G(A, B, C, D) = Number of essential prime implicates: Final SOP Final POS (SOP) (POS) ECE 2030 -- Introduction to Computer Engineering February 26, 2007 EXAM #2 Page 4 of 5 Problem 3. (12 points) A. (6 points) A 4-to-1 multiplexer, shown to the right, can be used to implement any arbitrary combinational logic function of input bits X and Y. For each row in the table below, specify the values (0 or 1) that should be assigned to inputs LF0, LF1, LF2, and LF3 to implement the logic function listed in the first column. FUNCTION X X + Y X+Y + = exclusive-OR LF0 LF1 LF2 LF3 LF0 LF1 LF2 LF3 I0 I1 I2 I3 S1 S0 OUT X Y B. (4 points) A function is defined by the truth table given below. Draw the schematic for a circuit implementing this function using either a 4-to-1 multiplexer or a 3-to-8 decoder as the key component, along with additional logic gates as needed. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 0 1 0 0 1 0 1 0 C. (2 points) An 8-to-3 priority encoder (shown at right) is designed to have the following input priority order (highest to lowest): I6, I4, I2, I0, I1, I3, I5, I7. For each row in the table below, enter the encoder output (D2D1D0) that will be generated for the input...

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