B Appendix Benchmark Programs
The following benchmarks illustrate the source code syntax and programming techniques for the DSP56300 core. Initialization cycles are not taken into account. Table B-1 lists the DSP benchmark programs provided in this appendix.
Table B-1. List of Benchmark Programs
Benchmark Page Number of Words 3 7 4 9 6 Clock Cycles 4 2N + 8 5 2N + 8 N + 14 Sample Rate or Execution Time for 60 MHz Clock Cycle 67 ns 33.3 N + 133.6 ns 83 ns 33.3N + 133.6 ns 60/(N + 14) MHz
Real Multiply N Real Multiply Real Update N Real Updates Real Correlation or Convolution (FIR Filter) Real * Complex Correlation or Convolution (FIR Filter) Complex Multiply N Complex Multiplies Complex Update N Complex Updates Complex Correlation or Convolution (FIR Filter) Nth Order Power Series (Real) Second Order Real Biquad IIR Filter N Cascaded Real Biquad IIR Filter N Radix-2 FFT Butterflies (DIT, In-Place Algorithm) True (Exact) LMS Adaptive Filter
page B-3 page B-4 page B-5 page B-6 page B-7
page B-8
9
2N + 10
30/(N + 5) MHz
page B-10 page B-11 page B-12 page B-13 page B-15
6 9 7 9 16
7 5N + 9 8 4N + 9 4N + 13
117 ns 66.7N + 150.3 ns 133 ns 66.7N + 150.3 ns 30/(2N + 5.5) MHz
page B-17 page B-18 page B-19 page B-20
10 7 10 12
2N + 11 9 5N + 10 8N + 9
33.3N + 183.7ns 150.3 ns 12/(N + 2) MHz 133.6N + 150.3 ns
page B-21
15
3N + 16
60/(3N + 17) MHz
Motorola
DSP56300 Family Manual
B-1
Benchmarks
Table B-1. List of Benchmark Programs (Continued)
Benchmark Page Number of Words 13 10 12 14 15 13 19 Clock Cycles 3N + 12 3N + 10 4N + 8 5N + 19 5N + 19 14 11N2 + 8N +7 Sample Rate or Execution Time for 60 MHz Clock Cycle 60/(3N + 12) MHz 60/(3N + 10) MHz 30/(2N + 4) MHz 60/(5N + 19) MHz 60/(5N + 19) MHz 233.8 ns 60/(11N2 + 8N + 7) MHz
Delayed LMS Adaptive Filter FIR Lattice Filter All Pole IIR Lattice Filter General Lattice Filter Normalized Lattice Filter [1 3][3 3] Matrix Multiplication N Point 3 3 2-D FIR Convolution
page B-24 page B-26 page B-28 page B-30 page B-32 page B-34 page B-35
Viterbi Add-Compare Select Parsing a Data Stream Creating a Data Stream Parsing a Hoffman Code Data Stream
page B-38 page B-41 page B-42 page B-45 7 2N + 8 33.3N + 133 ns
B.1 Benchmarks
The following benchmarks illustrate the source code syntax and programming techniques for the DSP56300 core. The assembly language source is organized into six columns, as shown in Table B-2..
Table B-2. Example of Assembly Language Source
Label Opcode Operands X Bus Data Y Bus Data Comment P T
FIR
MAC
X0,Y0,A
X:(R0)+,X0
Y:(R4)+,Y0
;Do each tap
1
1
The columns of Table B-2 are defined as follows:
Label Opcode
For program entry points and end of loop indication. .Indicates the Data ALU, Address ALU, or Program Controller operation to be performed. The Opcode column must always be included in the source code. Specifies the operands used by the opcode.
Operands
B-2
DSP56300 Family Manual
Motorola
Benchmarks
X Bus Data
Specifies an optional data transfer over the X Bus and the addressing mode to be used. Specifies an optional data transfer over the Y Bus and the addressing mode to be used. For documentation purposes; does not affect the assembled code. Provides the number of Program words used by the operation; should not be included in the source code. Provides the number of clock cycles used by the operation; should not be included in the source code.
Y Bus Data
Comment P
T
B.1.1
Real Multiply
Equation B-1:
c = ab
Table B-3. Real Multiply
Label
Opcode
Operands
X Bus Data
Y Bus Data
Comment
P 1 1 1 1 1
T
move mpyr move x0,y0,a
x:(r0),x0
y:(r4),y0
; ;
a,x:(r1)
;
Totals
2 ilock 4
3
Motorola
Benchmark Programs
B-3
Benchmarks
B.1.2
N Real Multiplies
Equation B-2:
c(i) = a(i) b(i)
i = 1, 2, , N
Table B-4. N Real Multiplies Memory Map
Pointer r0 r4 r1 c(i) X memory a(i) b(i) Y memory
Example B-1. N Real Multiplies
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move mpyr do mpyr move end move
#AADDR,r0 #BADDR,r4 #CADDR,r1 x:(r0)+,x0 x0,y0,a #N-1,end x0,y0,a a,x:(r1)+ x:(r0)+,x0 y:(r4)+,y0 x:(r0)+,x0 y:(r4)+,y0 y:(r4)+,y0
; ; ; ; ; ; ; ; ; a,x:(r1)+ ;
Totals 1 7 1 2N + 8 1 1 2 1 1 1 1 5 1 1
B-4
DSP56300 Family Manual
Motorola
Benchmarks
B.1.3
Real Update
Equation B-3:
d = c+ab
Example B-2. Real Update
Label
Opcode
Operands
X Bus Data
Y Bus Data
Comment
P
T
move move move move move move macr move
#AADDR,r0 #BADDR,r4 #CADDR,r1 #DADDR,r2 x:(r0),x0 x:(r1),a x0,y0,a a,x:(r2) y:(r4),y0 ; ; ; ;
Totals 1 1 1 1 4 1 1 1 2 ilock 5
Motorola
Benchmark Programs
B-5
Benchmarks
B.1.4
N Real Updates
Equation B-4:
d (i) = c(i) + a(i) b(i)
i = 1, 2, , N
Table B-5. N Real Updates Memory Map
Pointer r0 r4 r1 r5 c(i) d(i) X memory a(i) b(i) Y memory
Example B-3. N Real Updates
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move move do macr macr move move end
#AADDR,r0 #BADDR,r4 #CADDR,r1 #DADDR,r5 x:(r0)+,x0 x:(r1)+,a x:(r1)+,b #N/2,end x0,y0,a x1,y1,b x:(r1)+,a x:(r1)+,b x:(r0)+,x1 x:(r0)+,x0 a,y:(r5)+ b,y:(r5)+ y:(r4)+,y1 y:(r4)+,y0 y:(r4)+,y0
; ; ; ; ; ; ; ; ; ; ; ;
1 1 1 2 1 1 1 1 1 1 1 5 1 1 1 1
Totals
9
2N + 8
B-6
DSP56300 Family Manual
Motorola
Benchmarks
B.1.5
Real Correlation or Convolution (FIR Filter)
Equation B-5: N1
c(n) =
[a(i) b(n i)]
i=0 Table B-6. Real Correlation or Convolution (FIR Filter) Memory Map
Pointer r0 r4 X memory a(i) b(i) Y memory
Example B-4. Real Correlation or Convolution (FIR Filter)
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move movep clr rep mac macr movep
#AADDR,r0 #BADDR,r4 #N 1,m4 m4,m0 y:input,y:(r 4) a #N 1 x0,y0,a x0,y0,a a,y:output x:(r0)+,x0 y:(r4),y0 (r4)+ x:(r0)+,x0 y:(r4),y0 ; ; ; ; ; ; ; ; ;
Totals 1 2
1 1 1 1 1 6
1 5 1 1 2 ilock N + 14
Motorola
Benchmark Programs
B-7
Benchmarks
B.1.6
Real * Complex Correlation or Convolution (FIR Filter)
Equation B-6: N1
cr ( n ) = jci ( n ) =
N1
[ ( ar ( i ) + jai ( i ) ) b ( n i ) ]
N1
i=0
cr ( n ) =
ar ( i ) b ( n i )
ci ( n ) =
ai ( i ) b ( n i )
i=0
i=0
Table B-7. Real * Complex Correlation or Convolution (FIR Filter) Memory Map
Pointer r0 r4 r1 X memory ar(i) b(i) cr(n) ci(n) Y memory ai(i)
Example B-5. Real * Complex Correlation or Convolution (FIR Filter)
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move movep clr clr do mac mac end
#AADDR,r0 #BADDR,r4 #CADDR,r1 #N-1,m4 m4,m0 y:input,x:(r 4) a b #N-1,end x0,x1,a y0,x1,b x:(r0),x0 x:(r4)-,x1 y:(r0)+,y0 x:(r0),x0 x:(r4)-,x1 y:(r0)+,y0
; ; ; ; ; ; ; ; ; ; ;
1 2
1 1 2 1 1
1 1 5 1 1
B-8
DSP56300 Family Manual
Motorola
Benchmarks
Example B-5. Real * Complex Correlation or Convolution (FIR Filter) (Continued)
macr macr move move x0,x1,a y0,x1,b (r4)+ a,x:(r1) b,y:(r1) ; ; ; ;
Totals 1 1 1 1 11 1 1 1 1 2N + 11
Motorola
Benchmark Programs
B-9
Benchmarks
B.1.7
Complex Multiply
Equation B-7:
cr + jci = ( ar + jai ) ( br + jbi ) cr = ar br ai bi ci = ar bi + ai br
Table B-8. Complex Multiply Memory Map
Pointer r0 r4 r1 X memory ar br cr Y memory ai bi ci
Example B-6. Complex Multiply
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move mpy macr mpy macr move
#AADDR,r0 #BADDR,r4 #CADDR,r1 x:(r0),x1 y0,x1,b x0,y1,b x0,x1,a -y0,y1,a a,x:(r1) b,y:(r1) x:(r4),x0 y:(r4),y0 y:(r0),y1 ; ; ; ; ; ;
Totals 1 1 1 1 1 1 6 1 1 1 1 1 2 i'lock 7
B-10
DSP56300 Family Manual
Motorola
Benchmarks
B.1.8
N Complex Multiplies
Equation B-8:
cr ( i ) + jci ( i ) = ( ar ( i ) + jai ( i ) ) ( br ( i ) + jbi ( i ) ) cr ( i ) = ar ( i ) br ( i ) ai ( i ) bi ( i ) ci ( i ) = ar ( i ) bi ( i ) + ai ( i ) br ( i )
i = 1, 2, , N
Table B-9. N Complex Multiplies Memory Map
Pointer r0 r4 r5 X memory ar(i) br(i) cr(i) Y memory ai(i) bi(i) ci(i)
Example B-7. N Complex Multiplies
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move do mpy macr mpy macr end move
#AADDR,r0 #BADDR,r4 #CADDR-1,r 5 x:(r0),x1 x:(r5),a #N,end y0,x1,b x0,y1,b -y0,y1,a x0,x1,a x:(r0),x1 x:(r4)+,x0 a,x:(r5)+ y:(r4),y0 b,y:(r5) y:(r0)+,y1 y:(r4),y0
; ; ; ; ; ; ; ; ; ;
1 1 2 1 1 1 1 1 1 5 1 1 1 1
a,x:(r5)
;
Totals
1 9
2 i'lock 4N + 9
Motorola
Benchmark Programs
B-11
Benchmarks
B.1.9
Complex Update
Equation B-9:
dr + jdi = ( cr + jci ) + ( ar + jai ) ( br + jbi ) dr = cr + ar br ai bi di = ci + ar bi + ai br
Table B-10. Complex Update Memory Map
Pointer r0 r4 r1 r2 X memory ar br cr dr Y memory ai bi ci di
Example B-8. Complex Update
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move mac macr mac macr move
#AADDR,r0 #BADDR,r4 #CADDR,r1 #DADDR,r2 y:(r1),b x:(r0),x1 y0,x1,b x0,y1,b x0,x1,a -y0,y1,a a,x:(r2) b,y:(r2) x:(r4),x0 x:(r1),a y:(r4),y0 y:(r0),y1 ; ; ; ; ; ; ;
Totals 1 1 1 1 1 1 1 7 1 1 1 1 1 1 2 i'lock 8
B-12
DSP56300 Family Manual
Motorola
Benchmarks
B.1.10
N Complex Updates
Equation B-10:
dr ( i ) + jdi ( i ) = ( cr ( i ) + jci ( i ) ) + ( ar ( i ) + jai ( i ) ) ( br ( i ) + jbi ( i ) ) dr ( i ) = cr ( i ) + ar ( i ) br ( i ) ai ( i ) bi ( i ) di ( i ) = ci ( i ) + ar ( i ) bi ( i ) + ai ( i ) br ( i ) i = 1, 2, , N
Table B-11. N Complex Updates Memory Map
Pointer r0 r4 r1 r5 cr(i) ; ci(i) dr(i) ; di(i) X memory ar(i) ; ai(i) br(i) ; bi(i) Y memory
Example B-9. N Complex Updates
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move do mac macr mac macr end move
#AADDR,r0 #BADDR,r4 #CADDR,r1 #DADDR-1,r5 x:(r0)+,x1 x:(r1)+,b #N,end y0,x1,b x0,y1,b x0,y0,a x1,y1,a ;2 5 x:(r0)+,x0 x:(r1)+,a x:(r1)+,b x:(r0)+,x1 y:(r4)+,y1 a,y:(r5)+ b,y:(r5)+ y:(r4)+,y0 y:(r4)+,y0 y:(r5),a
; ; ; ; ; ; ; ; ; ; ;
1 1 2 1 1 1 1 1 1 5 1 1 2 i'lock 1
a,y:(r5)+
;
Totals
1 9
2 i'lock 5N + 9
Motorola
Benchmark Programs
B-13
Benchmarks
Table B-12. N Complex Updates Memory Map
Pointer r0 r4 r1 r5 X memory ar(i) br(i) cr(i) dr(i) Y memory ai(i) bi(i) ci(i) di(i)
Example B-10. N Complex Updates
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move move do mac macr mac macr move end move
#AADDR,r0 #BADDR,r4 #CADDR,r1 #DADDR-1,r5 x:(r5),a x:(r0),x1 x:(r4)+,x0 #N,end y0,x1,b x0,y1,b -y0,y1,a x0,x1,a a,x:(r5)+ x:(r1)+,a y:(r4),y0 x:(r0),x1 x:(r4)+,x0 b,y:(r5) y:(r1),b y:(r0)+,y1 y:(r4),y0 y:(r1),b
; ; ; ; ; ; ; ; ; ; ; ; ;
1 1 1 2 1 1 1 1 1 1 1 1 5 1 1 1 1 1
a,x:(r5)
;
Totals
1 11
1 5N + 9
B-14
DSP56300 Family Manual
Motorola
Benchmarks
B.1.11
Complex Correlation or Convolution (FIR Filter)
Equation B-11: N1
cr ( n ) + jci ( n ) =
[ ( ar ( i ) + jai ( i ) ) ( br ( n i ) + jbi ( n i ) ) ]
i=0 N1
cr ( n ) =
[ ar ( i ) br ( n i ) ai ( i ) bi ( n i ) ]
i=0 N1
ci ( n ) =
[ ar ( i ) bi ( n i ) + ai ( i ) br ( n i ) ]
i=0 Table B-13. Complex Correlation or Convolution (FIR Filter) Memory Map
Pointer r0 r4 r1 X memory ar(i) br(i) cr(i) Y memory ai(i) bi(i) ci(i)
Example B-11. Complex Correlation or Convolution (FIR Filter)
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move movep movep clr clr
#AADDR,r0 #BADDR,r4 #CADDR,r1 #N-1,m4 #m4,m0 y:input,x:(r 4) y:input,y:(r 4) a b x:(r0),x1 y:(r4),y0
; ;
1
2
1
2
; ;
1 1
1 1
Motorola
Benchmark Programs
B-15
Benchmarks
Example B-11. Complex Correlation or Convolution (FIR Filter) (Continued)
do mac mac mac mac end mac macr mac macr move move a,x:(r1) y0,x1,b x0,y1,b x0,x1,a -y0,y1,a b,y:(r1) x:(r4),x0 y:(r0)+,y1 ; ; ; ; ; ;
Totals 1 1 1 1 1 1 16 1 1 1 1 1 1 4N + 13
#N-1,end y0,x1,b x0,y1,b x0,x1,a -y0,y1,a x:(r0),x1 y:(r4),y0 x:(r4)-,x0 y:(r0)+,y1
; ; ; ; ;
2 1 1 1 1
5 1 1 1 1
B-16
DSP56300 Family Manual
Motorola
Benchmarks
B.1.12
Nth Order Power Series (Real)
Equation B-12: N1
c =
[ a( i ) bi ]
i=0 Table C-3. Nth Order Power Series (Real) Memory Map
Pointer r0 r4 r1 c X memory a(i) b Y memory
Example B-12. Nth Order Power Series (Real)
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move mpyr move do mac mpyr end macr move
#AADDR,r0 #BADDR,r4 #CADDR,r1 x:(r0)+,a y:(r4),x0 x0,x0,b x:(r0)+,y0 b,y1 #N-1,end y0,x0,a x0,y1,b x:(r0)+,y0 b,x0
;
;
1 1
1 1 1 2 i'lock 5 1 1
; ; ; ; ;
1 1 2 1 1
y0,x0,a a,x:(r1)
; ;
Totals
1 1 10
1 2 i'lock 2N + 11
Motorola
Benchmark Programs
B-17
Benchmarks
B.1.13
Second Order Real Biquad IIR Filter
Equation B-13:
w ( n ) 2 = x ( n ) 2 ( a1 ) 2 w ( n 1 ) ( a2 ) 2 w ( n 2 ) y ( n ) 2 = w ( n ) 2 + ( b1 ) 2 w ( n 1 ) + ( b2 ) 2 w ( n 2 )
Table B-1. Second Order Real Biquad IIR Filter Memory Map
Pointer r0 r4 X memory w(n-2), w(n-1) a2/2, a1/2, b2/2, b1/2 Y memory
Example B-13. Second Order Real Biquad IIR Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move movep rnd mac mac mac macr movep
#AADDR,r0 #BADDR,r4 #1,m0 #3,m4 y:input,a a -y0,x0,a -y0,x1,a y0,x0,a y0,x1,a a,y:output x:(r0)+,x0 x:(r0)-,x1 x1,x:(r0)+ a,x:(r0) y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4),y0
; ;
; ; ; ; ; ; ;
Totals
1 1 1 1 1 1 1 7
1 1 1 1 2 i'lock 1 2 i'lock 9
B-18
DSP56300 Family Manual
Motorola
Benchmarks
B.1.14
N Cascaded Real Biquad IIR Filter
Equation B-14:
w ( n ) 2 = x ( n ) 2 ( a1 ) 2 w ( n 1 ) ( a2 ) 2 w ( n 2 ) y ( n ) 2 = w ( n ) 2 + ( b1 ) 2 w ( n 1 ) + ( b2 ) 2 w ( n 2 )
Table B-2. N Cascaded Real Biquad IIR Filter Memory Map
Pointer r0 r4 X memory w(n-2)1, w(n-1)1, w(n-2)2, ... (a2/2)1, (a1/2)1, (b2/2)1, (b1/2)1, (a2/2)2, ... Y memory
Table B-3. N Cascaded Real Biquad IIR Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
ori move move move move move movep do mac mac mac mac end rnd movep
#$08,mr #AADDR,r0 #BADDR,r4 #(2N-1),m0 #(4N-1),m4 x:(r0)+,x0 y:input,a #N,end -y0,x0,a -y0,x1,a y0,x0,a y0,x1,a x:(r0)-,x1 x1,x:(r0)+ a,x:(r0)+ x:(r0)+,x0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0
; ; ; ; ; ; ; ; ; ; ; ;
1 1 2 1 1 1 1 1 1 5 1 1 2 ilock 1
a a,y:output
; ;
Totals
1 1 10
1 2 i'lock 5N + 10
Motorola
Benchmark Programs
B-19
Benchmarks
B.1.15
N Radix-2 FFT Butterflies (DIT, In-Place Algorithm)
Equation B-15:
ar' = ar + cr br ci bi ai' = ai + ci br + cr bi
br' = ar cr br + ci bi = 2 ar a r' bi' = ai ci br cr bi = 2 ai a i'
Table B-4. N Radix-2 FFT Butterflies (DIT, In-Place Algorithm) Memory Map
Pointer r0 r1 r6 r4 r5 X memory ar(i) br(i) cr(i) ar(i) br(i) Y memory ai(i) bi(i) ci(i) ai(i) bi(i)
Example B-14. N Radix-2 FFT Butterflies (DIT, In-Place Algorithm)
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move move do mac macr subl move mac macr subl end move
#AADDR,r0 #BADDR,r1 #CADDR,r6 #ATADDR,r4 #BTADDR-1,r5 x:(r1),x1 x:(r5),a #N,end y0,x1,b x0,y1,b b,a x:(r0),b x0,x1,b -y0,y1,b b,a x:(r0)+,a x:(r1),x1 b,x:(r4)+ b,y:(r4) a,y:(r5) y:(r6),y0 y:(r0),b x:(r6)+n,x 0 a,x:(r5)+ y:(r1)+,y1 y:(r0),a y:(r6),y0 y:(r0),b
; ; ; ; ; ;
1 1 1 1 5 1 1 1 1 1 1 2 i'lock
; ; ; ; ; ; ; ;
2 1 1 1 1 1 1 1
a,x:(r5)+
;
Totals
1 12
2 i'lock 8N + 9
B-20
DSP56300 Family Manual
Motorola
Benchmarks
B.1.16
True (Exact) LMS Adaptive Filter
x(n) z-1
x(n-1) z-1
x(n-2) z-1
x(n-3)
h(1) h(0) +
h(2) h(3) f(n)
d(n) -
e(n)
x(n)Input sample at time n d(n)Desired signal at time n f(n)FIR lter output at time n H(n)Filter coefcient vector at time n. H = {h0,h1,h2,h3} X(n)Filter state variable vector at time N, X = {x(n),x(n 1),x(n 2),x(n 3)} uAdaptation Gain NTAPSNumber of coefcient taps in the lter. For this example, NTAPS = 4
Figure B-1. True (Exact) LMS Adaptive Filter Table B-5. System Equations
True LMS Algorithm e(n) = d(n) H(n) (n) H(n + 1) = H(n) + uX(n)e(n) Delayed LMS Algorithm e(n) = d(n) H(n) (n) H(n + 1) = H(n) + uX(n 1)e(n 1)
Table B-6. LMS Algorithms
True LMS Algorithm Get input sample Save input sample Do FIR Get d(n), find e(n) Update coefficients Output f(n) Shift vector X Delayed LMS Algorithm Get input sample Save input sample Do FIR Update coefficients Get d(n), find e(n) Output f(n) Shift vector X
Motorola
Benchmark Programs
B-21
Benchmarks
Table B-7. True (Exact) LMS Adaptive Filter Memory Map
Pointer r0 r4, r5 X memory x(n), x(n 1), x(n 2), x(n 3) h(0), h(1), h(2), h(3) Y memory
Example B-15. True (Exact) LMS Adaptive Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move move move _getsmp movep clr
#-2,n0 n0,n4 #NTAPS-1,m 0 m0,m4 m0,m5 #AADDR+NTAPS-1,r0 #BADDR,r4 r4,r5
;
; ; ; ; ; ;
y:input,x0 a x0,x:(r0)+
; input sample y:(r4)+,y0 ; save ;X(n), get h0
1 1
1 1
rep
#NTAPS-1
; do fir ; do taps
1
5
mac
x0,y0,b
x:(r0)+,x0
y:(r4)+,y0
; ; last tap
1
1
macr
x0,y0,b
;
1
1
; Get d(n), subtract fir output, multiply by u, ; put the result in y1. ; This section is application dependent. move movep x:(r0)+,x0 b,y:output y:(r4)+,a ; output fir if desired
1 1 1 1
B-22
DSP56300 Family Manual
Motorola
Benchmarks
Example B-15. True (Exact) LMS Adaptive Filter (Continued)
move do macr macr tfr tfr cup move ; continue looping (jmp _getsmp)
Total 15 3N + 16
y:(r4)+,b #NTAPS/2,c up x0,x1,a x0,x1,b y0,a y0,b x:(r0)+,x0 x:(r0)+,x0 y:(r4)+,y0 y:(r4)+,y1 a,y:(r5)+ b,y:(r5)+ ; ; ;
1 2
1 5
1 1 1 1
1 1 1 1
x:(r0)+n0, x0
y:(r4)+n4,y 0
;
1
1
Motorola
Benchmark Programs
B-23
Benchmarks
B.1.17
s s s
Delayed LMS Adaptive Filter
Error signal is in y1 FIR sum in a = a + h(k)old * x(n k) h(k)new in b = h(k)old + error * x(n k 1)
Table B-8. Delayed LMS Adaptive Filter Memory Map
Pointer r0 r5, r4 X memory x(n), x(n 1), x(n 2), x(n 3), x(n 4) dummy, h(0), h(1), h(2), h(3) Y memory
Example B-16. Delayed LMS Adaptive Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move move move movep move clr move
#STATE,r0 #2,n0 #NTAPS,m0 #COEF+1,r4 m0,m4 #COEF,r5 m4,m5 y:input,a a,x:(r0) a x:(r0)+,x0 x:(r0)+,x1
; start of X ; used for pointer update ; number of filter taps ; start of H ; number of filter taps ; start of H-1 ; number of filter taps ; get input sample ; save input sample ; x0<-x(n) y:(r4)+,y0 ; x1<-x(n-1); y0<-h(0)
1 1 1 1 1 1 1 1
do
#TAPS/2,lms
;
2
5
;a<-h(0)*x(n) b<-h(0) Y<-dummy mac x0,y0,a y0,b b,y:(r5)+
1 2 ilock
;b<-H(0)=h(0)+e*x(n-1), x0<-x(n-2), y0<-h(1) macr x1,y1,b x:(r0)+,x0 y:(r4)+,y0 ;
1 1
B-24
DSP56300 Family Manual
Motorola
Benchmarks
Example B-16. Delayed LMS Adaptive Filter (Continued)
;a<-a+h(1)*x(n-1); b<-h(1); Y(0)<-H(0) mac x1,y0,a y0,b b,y:(r5)+ ;
1 2 ilock
;b<-H(1)=h(1)+e*x(n-2); x1<-x(n-3); y0<-h(2) macr lms movep move move a,y:output b,y:(r5)+ (r0)-n0 ; Y<-last coef ; update pointer
Totals 1 1 1 13 1 1 1 3N + 12
x0,y1,b
x:(r0)+,x1
y:(r4)+,y0
;
1
1
Motorola
Benchmark Programs
B-25
Benchmarks
B.1.18
FIR Lattice Filter
Output + Input k1 k1 z-1 s1 + z-1 k2 k2 + z-1 + k3 k3 + +
s2
s3
sx
Single Section: t' = s*k + t, t' t s' = t*k + s t + B (in) k1 k1 z-1 + z-1 + + k2 k2 z-1 k k + + t'
s1
s2
s
s'
Figure B-2. FIR Lattice Filter Table B-9. FIR Lattice Filter Memory Map
Pointer r0 r4 X memory s1, s2, s3, sx k1, k2, k3 Y memory
Example B-17. FIR Lattice Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move movep move
#S,r0 #N,m0 #K,r4 #N-1,m4 y:datin,b b,a
; point to s ; N = number of k coefficients ; point to k coefficients ; mod for k's ; get input ; save first state
1 1 1 1
B-26
DSP56300 Family Manual
Motorola
Benchmarks
Example B-17. FIR Lattice Filter (Continued)
move do macr tfr macr _elat move movep b,y:datout a,x:(r0)+ y:(r4)-,y0 ; adj r4, ; dummy load ; output sample
Totals 1 1
x:(r0),x0 #N,_elat x0,y0,b x0,a y1,y0,a a,x:(r0)+ x:(r0),x0
y:(r4)+,y0
; get s, get k ;
1 2 1
1 5 1
b,y1
; s*k+t,copy t ; for mul ; save s', ; copy next s
1
1
y:(r4)+,y0
; t*k+s, get s, ; get k
1
1
1 10
1 3N + 10
Motorola
Benchmark Programs
B-27
Benchmarks
B.1.19
All Pole IIR Lattice Filter
Input
+
+ k2
+ k1 k1 z-1 + z-1
Output
k3 z-1 +
k2
s3
s2
s1
t
+ k k + z-1
t'
Single Section: t' = t k*s s' = s k*t' + t' t
s'
s
Figure B-3. All Pole IIR Lattice Filter Table B-10. All Pole IIR Lattice Filter Memory Map
Pointer r0 r4 X memory k3, k2, k1 s3, s2, s1 Y memory
Example B-18. All Pole IIR Lattice Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move move movep move macr
#k+N-1,r0 #N-1,m0 #STATE,r4 m0,m4 #1,n4 y:datin,a x:(r0)-,x0 -x0,y0,a x:(r0)-,x0 y:(r4)+,b y:(r4)+,y0 y:(r4),y0
;point to k ;number of k's-1 ;point to filter states ;mod for states ; ;get input ;get s, get k ;s*k+t
1 1 1 1 1 1
B-28
DSP56300 Family Manual
Motorola
Benchmarks
Example B-18. All Pole IIR Lattice Filter (Continued)
do macr tfr macr _endlat movep move move b,y:(r4)+ a,y:datout x:(r0)+,x0 y:(r4)+,r0 ;output sample ;save s'
1 1 1 1 1 1
#N-1,_endl at -x0,y0,a y1,b x1,x0,b a,x1 x:(r0)-,x0 y:(r4)+,y1 b,y:(r4) y:(r4),y0
;do sections ; ;
2
5
1 1 1
1 2 i'lock 1
;save last s', update r4 move a,y:(r4)
Totals 1 12 1 4N + 8
Motorola
Benchmark Programs
B-29
Benchmarks
B.1.20
General Lattice Filter
Input
+ k3 k3 + z-1 w2
+ k2 k2 + z-1 w1 + w3
+ k1 k1 + z-1
w0 Output t + k k + z-1 t'
Single Section: t' = t k*s s' = s + k*t' t' t Output = (w*s')
s'
s w
Figure B-4. General Lattice Filter Table B-11. General Lattice Filter Memory Map
Pointer r0 r4 X memory k3, k2, k1, w3, w2, w1, w0 s4, s3, s2, s1 Y memory
Example B-19. General Lattice Filter
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move
#K,r0 #2*N,m0 #STATE,r4 #-2,n4
;point to coefficients ;mod 2*(# of k's)+1 ;point to filter states
B-30
DSP56300 Family Manual
Motorola
Benchmarks
Example B-19. General Lattice Filter (Continued)
move movep move do macr tfr macr _endlat move clr move rep mac macr movep #N x0,y0,a x0,y0,a a,y:datout x:(r0)+,x0 y:(r4)+,y0 a b,y:(r4)+ a,y:(r4)+ y:(r4)+,y0 ; ;s*w+out, ; get s, get w ;last mac ;output sample
Totals
#N,m4 y:datin,a x:(r0)+,x0 #N,_endlat -x0,y0,a y0,b x1,x0,b a,x1 x:(r0)+,x0
;mod on filter states ;get input y:(r4)-,y0
1 1 2 1 1 5 1 2 i'lock
; b,y:(r4)+n 4 y:(r4)-,y0 ; ;
1 1
1
1
;save s' ;save last s', ; update r4
1 1
2 i'lock 1
1 1 1
1 5 1
1 1 14
1 2 ilock 5N + 19
Motorola
Benchmark Programs
B-31
Benchmarks
B.1.21
Normalized Lattice Filter
t
q
+
t'
k u' +
Single Section: t' = t*q - k*s u' = t*k + s*q t' t Output = (w*u')
k u
q w
z-1
Input
q2
+
q1
+
q0
+
k2
k2 q2
k1
k1 q1
k0
k0 q0
+
z-1 w2
+
z-1 w1
+
z-1
+ w3 w0 Output
Figure B-5. Normalized Lattice Filter Table B-12. Normalized Lattice Filter Memory Map
Pointer r0 r4 X memory q2, k2, q1, k1, q0, k0, w3, w2, w1, w0 sx, s2, s1, s0 Y memory
B-32
DSP56300 Family Manual
Motorola
Benchmarks
Example B-20. Normalized Lattice Filter
Label Opcod e Operands X Bus Data Y Bus Data Comment P T
move move move move movep move do mpy macr mpy macr _elat move move clr rep mac macr movep
#COEF,r0 #3*N,m0 #STATE+1,r4 #N,m4 y:datin,y0 x:(r0)+,x1 #N,_elat x1,y0,a -x0,y1,a x0,y0,b x1,y1,b x:(r0)+,x1 a,y0 x:(r0)+,x0 y:(r4),y1 b,y:(r4)+
; point to ; coefficients ; mod on ; coefficients ; point to ; state variables ; mod on filter ; states ; get input sample ; get q in the ; table
1 1 1 1
2
5 1 1
; q * t,get k,get s ; q * t - k * s, ; save new s ; k * t ; k * t + q * s ; get next q,set t'
1 1
1 1
1 1
b,y:(r4)+ a,y:(r4)+ a #N x1,y0,a x1,y0,a a,y:datout x:(r0)+,x1 (r4)+ y:(r4)+,y0 y:(r4)+,y0
; save second ; last state ; save last state ; clear a, get ; first state
1
2 i'lock
1 1
1 1
1
5 1 1
; fir taps ; round, ; adj pointer ; output sample
Total
1 1
1 15
2 i'lock 5N + 19
Motorola
Benchmark Programs
B-33
Benchmarks
B.1.22
[1 3][3 3] Matrix Multiplication
Example B-21. [1 3][3 3] Matrix Multiplication
Label
Opcode
Operands
X Bus Data
Y Bus Data
Comment
P
T
_init move move move move move move _start move mpy mac macr mpy move mac macr mpy move mac macr move _end
Totals 13 14
#MAT_A,r0 #MAT_B,r4 #MAT_X,r1 #2,m0 #8,m4 m0,m1
;point to A matrix ;point to B matrix ;output X matrix ;mod 3 ;mod 9 ;mod 3
x:(r0)+,x 0 x0,y0,a x0,y0,a x0,y0,a x0,y0,b
y:(r4)+,y0 x:(r0)+,x0 x:(r0)+,x0 x:(r0)+,x0 x:(r0)+,x0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 a,y:(r1)+
1
1
1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 2 ilock
x0,y0,b x0,y0,b x0,y0,a
x:(r0)+,x0 x:(r0)+,x0 x:(r0)+,x0
y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 b,y:(r1)+
x0,y0,a x0,y0,a
x:(r0)+,x0
y:(r4)+,y0
a,y:(r1)+
1
B-34
DSP56300 Family Manual
Motorola
Benchmarks
B.1.23
N Point 3 3 2-D FIR Convolution
The two-dimensional FIR uses a [3 3] coefficient mask:
c(1,1) c(1,2) c(1,3) c(2,1) c(2,2) c(2,3) c(3,1) c(3,2) c(3,3)
The coefficient mask is stored in Y memory in the following order:
c(1,1), c(1,2), c(1,3), c(2,1), c(2,2), c(2,3), c(3,1), c(3,2), c(3,3).
The image is an array of 512 512 pixels. To provide boundary conditions for the FIR filtering, the image is surrounded by a set of 0s such that the image is actually stored as a 514 514 array.
514
514
Image Area [512x512]
Area of zeros
Figure B-6. FIR Filtering
The image (with boundary) is stored in row major storage. The first element of the array image(,) is image(1,1) followed by image(1,2). The last element of the first row is image(1,514) followed by the beginning of the next column image(2,1). These are stored sequentially in the array im in X memory:
s s
Image(1,1) maps to index 0, image(1,514) maps to index 513; Image(2,1) maps to index 514 (row major storage).
Although many other implementations are possible, this is a realistic type of image environment in which the actual size of the image may not be an exact power of 2. Other possibilities include storing a 512 512 image but computing only a 511 511 result, computing a 512 512 result without boundary conditions but throwing away the pixels on the border, and so on.
Motorola
Benchmark Programs
B-35
Benchmarks
Table B-13. N Point 3 3 2-D FIR Convolution Memory Map
Pointer r0 image(n,m) image(n,m+1) image(n,m+2) image(n+514,m) image(n+514,m+1) image(n+514,m+2) image(n+2*514,m) image(n+2*514,m+2) image(n+2*514,m+3) FIR coefficients output image
r1
r2
r4 r5
Example B-22. N Point 3 3 2-D FIR Convolution
Label Opcode Operands X Bus Data Y Bus Data Comment P T
move move move move
#MASK,r4 #8,m4 #IMAGE,r0 #IMAGE+514,r1
;point to coefficients ;mod 9 ;top boundary ;left of first pixel
;left of first pixel 2nd row move #IMAGE+2*514,r2 ;
;adjust. for end of row move move move #2,n1 n1,n2 #IMAGEOUT,r5 ; ; ;output image
;first element, c(1,1) move do do mpy mac #512,row #512,col x0,y0,a x0,y0,a x:(r0)+,x0 x:(r0)-,x0 y:(r4)+,y0 y:(r4)+,y0 x:(r0)+,x0 y:(r4)+,y0 ; ; ; ;c(1,2) ;c(1,3)
1 2 2 1 1 1 5 5 1 1
B-36
DSP56300 Family Manual
Motorola
Benchmarks
Example B-22. N Point 3 3 2-D FIR Convolution (Continued)
mac mac mac mac mac mac x0,y0,a x0,y0,a x0,y0,a x0,y0,a x0,y0,a x0,y0,a x:(r1)+,x0 x:(r1)+,x0 x:(r1)-,x0 x:(r2)+,x0 x:(r2)+,x0 x:(r2)-,x0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 y:(r4)+,y0 ;c(2,1) ;c(2,2) ;c(2,3) ;c(3,1) ;c(3,2) ;c(3,3)
1 1 1 1 1 1 1 1 1 1 1 1
; preload, get c(1,1) macr x0,y0,a x:(r0)+,x0 y:(r4)+,y0 ;
1 1
;output image sample move col ; adjust pointers for frame boundary, adj r0,r5 w/dummy loads move ; adj r1,r5 w/dummy loads move x:(r1)+n1, x0 y:(r5)+,y1 ;
1 1
a,y:(r5)+
;
1
2 i'lock
x:(r0)+,x0
y:(r5)+,y1
;
1
1
; adj r2 (dummy load y1), preload x0 for next pass move move row
Total
x:(r0)+,x0 y:(r2)+n2,y1
;
1 1
1 1
P = 19
T = 11N2 + 8N + 7
Motorola
Benchmark Programs
B-37
Benchmarks
B.1.24
Viterbi Add-Compare-Select (ACS)
This routine implements the Viterbi algorithm kernel. The algorithm is parametric and fits any valid values of Trellis states number and any branch metrics.
Example of Viterbi Butterfly: 16-State R=1/3 Trellis Structure - Butterfly Pairs State 0 i 1 2 3 4 5 6 7 8 j 9 A B C D E F Note: 000 111 111 000 k k+1
Branch metric of XXX = (Branch metric of bit inverse of XXX) For example, Branch metric (001) = (Branch metric (110)).
Figure B-7. Viterbi Butterfly
Given Branch Metric value (BrM), ACS should perform as follows:
s s s s s
Fetch path metric of state(i) Si. Fetch path metric of state(j) Sj. Add BrM to Si. Subtract BrM from Sj. Compare and select the greater of the two: Next Sk = Max (Si + BrM, S BrM). Store the result in next-state path-metric memory location. Update the states Trellis history with the selection bit. Perform the similar task for: Next Sk+1 = Max (Si BrM, Sj + BrM).
DSP56300 Family Manual Motorola
s s s
B-38
Benchmarks
$0 r5 $f move l:(r5) + n5,a : A add y1,a l:(r5) n5,b : sub y1,b : max a,b l:(r5) + n5,a : A
X-space Path Metric RAM a1 MetricA
Y-space Trellis RAM a0 TrellisA
Y1 Branch Metric
Fetch from RAM
b1 b0 a1 a0 B MetricA + y1 TrellisA b1: MetricB b0: TrellisB b1 b0 Fetch from RAM B MetricB y1 TrellisB a1 a0 b1 b0 b: max(a,b) a0: TrellisA A a1: MetricA B Survivor Metric Survivor Trellis b1 b0 B Survivor Metric Trellis << 1 + 0 X-space Path Metric RAM Y-space Trellis RAM = VSL b,#0,l:(r4) +
asl b b1,x:(r4) move b0,y:(r4) + $10 r4 $1f
Figure B-8. ACS ButterflyFirst Half
Fetch from RAM sub y1,a l:(r5) n5,b : add y1,b : max a,b : a1 a0 A MetricA y1 TrellisA b1 b0 B MetricB + y1 TrellisB b0 b: max(a,b) B Survivor Metric Survivor Trellis b1 b0 B Survivor Metric Trellis << 1 + 1 $10 X-space r4 $1f Path Metric RAM Y-space Trellis RAM = VSL b,#1,l:(r4) + b1 b1 B b1: MetricB b0 b0: TrellisB
move #1,a0 addl a,b b1,x:(r4) move b0,y:(r4) +
Figure B-9. ACS ButterflySecond Half
Motorola
Benchmark Programs
B-39
Benchmarks
Example B-23. Viterbi Add-Compare-Select (ACS)
Label Opcode Operands X Bus Data Y Bus Data Comment P T
; ; ; ; ; ;
r0 r4 r5 n5 y1 x0
-
R/W pointer to branch-metric table. write pointer - path metric Present State tables. read pointer - path metric tables Previous State. bit-count value, used for decode loop. given Brm for ACS loop tmp register ;
ComputeBrMtrc:
; for the general case, assuming that the branch metrics are ; calculated and prepared as table at y:(r0) location move ; load first branch metric. move l:(r5)+n5,a 1 y:(r0)+,y1 1
; a0 <- trellis, a1 <- PathMetr ; main ACS loop do add #NoOfAcsButt,NextStage y1,a l:(r5)-n5,b ; 2 1
; a=a+y1, b0 <- trellis, b1 <- PthMt sub max y1,b a,b l:(r5)+n5,a ; b=b-y1 1 1
; b=max(a,b) | refetch a vsl b,#0,l:(r4)+ 1
; store survivor path metric & trellis sub y1,a l:(r5)-n5, b 1
; a=a-y1 | refetch b add y1,b x:(r5)+,x0 y:(r0)+,y1 1
; b=b+y1 | increment r5 | load next brm. max a,b l:(r5)+n5,a 1
; b=max(a,b) | fetch next a vsl b,#1,l:(r4)+ 1
; store survivor path metric & trellis NextStage: move #branch_tbl,r0
2
; set r0 to start of br. metric table.
Total 14
B-40
DSP56300 Family Manual
Motorola
Benchmarks
B.1.25
Parsing a Data Stream
This routine implements parsing of a data stream for MPEG audio. The data stream, composed by concatenated words of variable length, is allocated in consecutive memory words. The word lengths reside in another memory buffer. The routine extracts words from the data stream according to their length. Two consecutive words are read from the stream buffer and are concatenated in the accumulator. Using bit offset and the specified length, a field of variable length can be extracted. The decision whether to load a new memory word into the accumulator from the stream is determined when bit offset overflow to the LSP of the accumulator. The following describes the pointers and registers used by the routine:
s s
r0pointer to the buffer in X memory containing the variable length stream r5pointer to buffer in Y memory where the length of each field is stored
Example B-24. Parsing Data Stream
Label
Opcode
Operands
X Bus Data
Y Bus Data
Comment
P
T
init_ move move move move move move move Get_bit s
; this is the initialization code #stream_buffer,r0 #length_buffer,r5 #bits_offset,r4 #boundary,r3 #>48,b #>24,x0 x0,x:(r3) b,y:(r4)
; bring length of next field and 24 move x:(r3),x0 y:(r5)+,y1
...