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12 Pages

### 2.Circuits

Course: CMSC 250, Fall 2007
School: Maryland
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Word Count: 315

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250 CMSC Discrete Structures Logic Applications (Circuits &amp; Adders) Circuits AND gate OR gate NOT gate May 1, 2009 Logic Applications 2 P ~ (Q ^ R) Combining &amp; Determining I/O Relationship May 1, 2009 Logic Applications 3 Draw the Circuit for: P, Q &amp; R are inputs Simplify before building the circuit May 1, 2009 P 1 1 1 1 0 0 0 0 Q 1 1 0 0 1 1 0 0 Logic Applications R 1...

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250 CMSC Discrete Structures Logic Applications (Circuits & Adders) Circuits AND gate OR gate NOT gate May 1, 2009 Logic Applications 2 P ~ (Q ^ R) Combining & Determining I/O Relationship May 1, 2009 Logic Applications 3 Draw the Circuit for: P, Q & R are inputs Simplify before building the circuit May 1, 2009 P 1 1 1 1 0 0 0 0 Q 1 1 0 0 1 1 0 0 Logic Applications R 1 0 1 0 1 0 1 0 Output 1 1 0 1 0 0 0 0 4 Number Conversions Base of the Number System Conversions from anything to Base 10 10 (decimal), 2 (binary), 8 (octal), 16 (hexadecimal) Tells how many different numerals are used Determines the value of each place Use the definition of the number system Use repeated integer division Logic Applications Conversions from Base 10 to anything May 1, 2009 5 Addition of Binary Numbers Carry if the number would be too large for the number system if it is greater than 1 1001 + 10 1001 + 11 1011 + 11 1011 +111 May 1, 2009 Logic Applications 6 Addition of Binary Numbers Carry if the number would be too large for the number system (larger than 7 or 15) 7238 + 128 2658 + 338 ABC16 + 1216 CDE16 1, +ED16 May 2009 Logic Applications 7 Using a Circuit for Addition Write as a logic expression Translate to circuits Input P 0 0 1 1 May 1, 2009 Output Q 0 1 0 1 Carry 0 0 0 1 Logic Applications Sum 0 1 1 0 8 Half Adder P Q sum carry P and Q are binary values (1 bit each) sum = (P v Q) ^ ~(P ^ Q) carry = (P ^ Q) May 1, 2009 Logic Applications 9 Full Adder P Q R half-adder #1 C1 S1 half-adder #2 C C2 S P, Q and R are binary digits P + Q + R gives sum value and carry value May 1, 2009 Logic Applications 10 Chain these half adders and full adders Parallel Adders together for multibit addition X1X2X3 + Y1Y2Y3 = CA1A2A3 X3 Y3 X2 Y2 X1 Y1 half-adder carry ...

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