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Duke - EE - 299
Star-Hspice ManualRelease 2001.2 June 2001Star-Hspice Manual, Release 2001.2, June 2001 Previously printed December 2000, V2000.4 Copyright 2001 Avant! Corporation and Avant! subsidiary. All rights reserved. Unpublished-rights reserved under the
Duke - EE - 299
Federal Communications Commission Before the Federal Communications Commission Washington, D.C. 20554FCC 02-48In the matter of Revision of Part 15 of the Commission's Rules Regarding Ultra-Wideband Transmission Systems) ) ) ) ) )ET Docket 98-
Duke - ECE - 261
Arithmetic Building Blocks Datapath elements Adder design Static adder Dynamic adder Multiplier design Array multipliers Shifters, Parity circuitsECE 261James Morizio1A Generic Digital ProcessorInput-OutputMEMORYCONTROLDATAPA
Duke - EE - 195
CDMA in OperationPractice TheoryCDMA Networks Cell Site Components Network Components CDMA Performance Call Processing Power Control Operation Administration MaintenanceCDMA StandardsVoice Data IS-95 A/B IS-2000 (1X/3X) HDRCDMA in
Duke - EE - 299
4-Bit DACMatthew RobertsOutline Abstract Schematic Output Simulation Plan and Results Layout Final SpecificationsAbstract The objective is to design a device that will extract an analog signal given a series of digital codes with the prop
Duke - EE - 299
ECE 262 Analog Integrated Circuit Design Spring 2009 Project Report"Fully differential Opamp using Replica Amplifier Method"Submitted by: Sameer Dash Ishan DixitAbstract: In this project, we have designed a fully differential Opamp using a repl
Duke - EE - 299
Phase-Locked Loop (PLL)Yang ZHAOECE262 April 29, 2009Block DiagramPhase Locking: aligning the output phase of the VCO with the reference phase; out = in; dout/dt - din/dt = 0 Phase detector; Charge Pump; VCOBlock DiagramPhase Detector: avera
Duke - EE - 299
High Bandwidth, HighGain Instrumentation AmplifierDaniel Klein Duke University ECE 262 Final ProjectProject AbstractThis analog design project will focus on the development of a low-power, high-gain instrumentation amplifier that can be used in a
Duke - EE - 299
Sallen-Key S ll K architecture hit t p bandpass filterApril29,2009:SaniHadziahmetovic p 9, 9ECE 262 PROJECT PROPOSALABSTRACTThisprojectaimstosimulateandlayoutaSallenkeyarchitecture Thi j t i t i l t dl t S ll k hit t bandpassfilterwith3dB
Duke - EE - 299
AC to DC Converter for Low Power ApplicationsVinh Nguyen Stewart Thomas ECE 262: Final ReportAbstractGoal: Convert 125 kHz AC signal with magnitude ~2.5V to DC level capable of driving logicFrequency later changed to 100-200 MHz to allow use of
Duke - ECE - 269
ECE 269 Course Outline, Spring 2009Date 01/08/09 01/13/09 Topic Introduction and background Test process and ATE, Test economics and product quality Fault modeling Logic and fault simulation Testability measures Combinational ATPG Sequential circuit
Duke - ECE - 269
ECE 269VLSI System TestingKrish Chakrabarty Lecture 1: OverviewECE 269Krish Chakrabarty1Lecture 1 IntroductionClass website: www.ee.duke.edu/~krish/teaching/269.html VLSI realization process Verification and test Ideal and real t
Stanford - COSN - 1021
04/20/2002 03:45 AM ESTUNITED STATES DISTRICT COURT SOUTHERN DISTRICT OF NEW YORK IN RE INITIAL PUBLIC OFFERING SECURITIES LITIGATION X : : : : X : : : : : XCoSine Communications, Inc.Master File No. 21 MC 92 (SAS)01 Civ. 10105 (SAS) AMENDED
Duke - ECE - 269
ECE 269VLSI System TestingKrish Chakrabarty Lecture 13: Design for Testability (DFT): 1ECE 269Krish Chakrabarty1Outline Motivation and Goals Controllability and Observability Ad Hoc DFT Methods Control/Test Point Insertion Circuit res
Duke - ECE - 269
ECE 269VLSI System TestingKrish Chakrabarty Built-In Self-Test (BIST)ECE 269Krish Chakrabarty1BIST Motivation Useful for field test and diagnosis (less expensive than a local automatic test equipment) Software tests for field test and di
Duke - ECE - 269
Power Management for Wafer-Level Test-During-Burn-InSudarshan BahukudumbiIntel Corporation, Hillsboro, Oregon, USAKrishnendu ChakrabartyDepartment of Electrical and Computer Engineering Duke University Durham, NC, USAIntroduction Demand for d
Duke - ECE - 269
ECE 269VLSI System TestingKrish Chakrabarty Lecture 21: Testing for Small-Delay Defects"I choose a block of marble and chop off everything that I do not need." Francoise Auguste Rodin (on how he created his statues)1What Are We After (This Cl
Duke - ECE - 269
ECE 269VLSI System TestingKrish Chakrabarty System-on-Chip (SOC) TestingECE 269Krish Chakrabarty1Outline Motivation for modular testing of SOCs Wrapper design IEEE 1500 Standard Optimization Test access mechanism design and optimizat
Duke - ECE - 269
ECE 269VLSI System TestingKrish Chakrabarty Test Compression1Test Compression Why do we need test compression? Test data volume Test time Number of chip/tester pins Why can we compress test data? Large number of don't-cares (Xs) in scan
Duke - ECE - 269
TutorialSurvey of Test Vector Compression TechniquesNur A. ToubaUniversity of Texas at AustinTest data compression consists of test vector compression on the input side and response compaction on the output side. Test vector compression has been
Stanford - COSN - 1021
US District Court Civil Docket as of 6/28/2007 Retrieved from the court on Thursday, December 18, 2008U.S. District Court Southern District of New York (Foley Square) CIVIL DOCKET FOR CASE #: 1:01-cv-10105-SASCosine Comm. IPO, et al v. Cosine Comm
Stanford - COSN - 1021
JUDGE SCHEINDLINUNITED STATES DI STRICT COURT SOUTHERN DISTRICT OF NEW YORKft, IN RE INITIAL PUBLIC OFFERING SECURITIES LITIGATION 21 MC 92^4X LINC CORP., on Behalf of Itself and All Others Similarly Situated,Plaintiff,Index No.CLASS ACTION
Stanford - JDSU - 1023
1 2 3 4 5 6 7 8JORDAN ETH (BAR NO. 121617) TERRI GARLAND (BAR NO. 169563) PHILIP T. BESIROF (BAR NO. 185053) MORRISON & FOERSTER LLP 425 Market Street San Francisco, California 94105-2482 Telephone: (415) 268-7000 Facsimile: (415) 268-7522 pbesirof
Stanford - RBAKD - 1029
Robert S. Green (State Bar No. 136183) Robert A. Jigarjian (State Bar No. 171107) GREEN & JIGARJIAN LLP 235 Pine Street, 15th Floor San Francisco, CA 94104 Telephone: (415) 477-6700 Facsimile: (415) 477-6710 ABBEY GARDY, LLP Mark C. Gardy Charles H.
Duke - ECE - 261
adapterboard-AO (5).max
Duke - EE - 164
Task List Group management plan Background studies Link budget: optical/electrical Build, test learning Rx board continued Order components for transceiver (TxRx) module Design, circuit schematic, layout of full duplex TxRx module (Run 1) Buil
Duke - ECE - 4006
Group 1 7 3 4 6 2 7 1 5 2 3 2 4 4 6 2 7 3 5 6 4 5 3 1 6 7 7 4 6 2 1 5 1 5First Ragad Shilo Tiffany James Theron Richard Jed Michael Melanie Curtis Ming Joshua Elisa Jinesh Gautam Christopher Dhairya Michelle Barry Vikas Bishan Nihar John Mustansir
Duke - ECE - 4006
Task List Group management plan Background studies Link budget: optical/electrical Build, test learning Rx board continued Order components for transceiver (TxRx) module Design, circuit schematic, layout of full duplex TxRx module (Run 1) Buil
Duke - ECE - 261
Combination LockECE261: VLSI December 11, 2007Chris Gregory Archana Ramamoorthy Viresh Thusu Andrew WangFeaturesMultiple users with different password protection for each user. User friendly indicators using LEDs. Time out for incorrect entrie
Princeton - COS - 116
COS 116 The Computational Universe Homework 61. The notion of exponential growth is mentioned in each of the following excerpts from a magazine or newspaper. Which of them use the notion correctly and which don't? Justify each answer in a line. Note
Princeton - COS - 116
COS 116 The Computational Universe Homework 2 Due 3/9/2006Q1) Why do supermarket chains and drugstores issue "preferred customer" cards? Q2) Convert 45 from decimal to binary. Convert 110101 from binary to decimal. Q3) In class we saw how to model t
Princeton - COS - 116
COS 116 The Computational Universe Writing and Blogging AssignmentDiscussion for Tuesday, May 2: Searle's brief but controversial article. Class discussion will focus on the following topics. Topic 1: Try to find passages in Searle's article that su
Princeton - COS - 116
COS 116: The Computational UniverseAdam Finkelstein COS116: 2/5/07COS 116: The Computational Universe Instructor: Adam Finkelstein Head TA: UmarSyedPreceptors: ForresterCole Ari Feldman Labs will be held in (Friend 005) Tues7-10
Princeton - COS - 116
COS 116 The Computational Universe More about selfreproducing programsThis handout gives more details on the construction of selfreproducing programs, which was sketched in Lecture 10. In this construction we assume that the machine has a separate
Duke - ECE - 3040
ECE 3040 d,e Microelectronic Devices and CircuitsFall, 2000 Class Meetings: M 1:05 1:55 pm (d lecture) OR M 2:05 2:55 pm (e lecture) AND T Th 12:05 1:25 pm (d lecture) OR TTh 1:35 2:55 pm (e lecture) Instructors: Prof. Nan Marie Jokerst and Prof
Duke - ECE - 3040
GEORGIA INSTITUTE OF TECHNOLOGY School of Electrical and Computer Engineering ECE 3040 D,E Course Outline Fall 2000 Text References P=Pierret J = Jaeger Web Notes J 1.2 P 1.1 P 1.2 P 2.2 P 2.3 P 2.4 P 2.5 P 3.1 P 3.2 P 3.3 P 3.4 P 4.1 P 5.1-5.2 P 6.1
Duke - ECE - 3040
4. The diode circuit in Figure 1 is a rectifier circuit. The voltage across the load R (vC) is to be a DC voltage of 5 V with a maximum ripple of +- 50 mV (100 mV peak to peak). Use the information given below to determine the smallest capacitance C,
Duke - ECE - 3040
dtime 0IS 1.00E-13Nk T 1 1.38E-23q 300 1.60E-19f 60C 3.00E-04time 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0vS 0 0.06 0.13 0.19 0.25 0.31 0.38 0.44 0.5 0.56 0.63 0.69 0.75 0.81 0.88
Duke - ECE - 269
ECE 269: VLSI System TestingSpring 2009 Krish Chakrabarty Homework 1 Assigned: January 22, 2009 Due: February 3, 2009 Instructions: You are required to work on the homework on your own. If you think a question has several interpretations, make reaso
Duke - ECE - 269
ECE 269: VLSI System TestingSpring 2009 Krish Chakrabarty Homework 2 Assigned: February 3, 2009 Due: February 17, 2009 (start of class) Instructions: You are required to work on the homework on your own. If you think a question has several interpret
Duke - ECE - 269
Problem 4 There are some parameters to be chosen when running the Fastscan to generate stuck-at test patterns. 1. N-detection Students can choose different n-detection patterns in the DOFILE using the following command. For an ordinary stuck-at test
Duke - ECE - 269
ECE 269: VLSI System TestingSpring 2009 Krish Chakrabarty Homework 3 Assigned: February 24, 2009 Due: March 17, 2009 (start of class) Instructions: You are required to work on the homework on your own. If you think a question has several interpretat
Duke - ECE - 269
ECE 269: VLSI System TestingSpring 2009 Krish Chakrabarty Solutions to Homework 3 Problem 1 Note: the solution of problem 1 is prepared by Yang Zhao. (a) Testing time for a full-scan circuit with n flip-flops, m scan chains, and p test patterns. The
Duke - ECE - 269
ECE 269: VLSI System TestingSpring 2009 Krish Chakrabarty Homework 4 Assigned: March 31, 2009 Due: April 14, 2009 (start of class) Instructions: You are required to work on the homework on your own. If you think a question has several interpretation
Stanford - EE - 102
Stanford University Spring 20082009ModulationThe modulation theorem tells us how to place a message signal m(t) on a carrier cos(ct). How do we recover m(t) from the modulated signal? What are the problems?Signal Processing and Linear Systems I
Duke - ECE - 4006
VCSEL Parameters Max Eyesafe Power Pout(max),VCSEL (mW) Fiber Attenuation (dB) Fiber Attenuation (Linear) Extinction Ratio (dB) Min Power Output Pout(min), VCSEL (mW) Imod (mA) VCSEL Manufacturer Honeywell Honeywell Optek Est Values based on Typical
Duke - ECE - 4006
Part Part # Units Unit Price (US$) Total(US$) Phone Cost of 1 Cost of 1000 Laser Driver Maxim 3287 1 6.59 6.59 9.84 6.59 TIA Maxim 3266 1 5.37 5.37 8 5.37 Limiting Amp Maxim 3264 1 6.39 6.39 4087377600 9.84 6.39 VCSEL Honeywell HFE4384-522 1 12 12 18
Duke - EE - 3270
#%!PS-Adobe-3.0 %Creator: Windows PSCRIPT %Title: Microsoft Word - NIVAMOD.DOC %BoundingBox: 14 9 597 784 %DocumentNeededResources: (atend) %DocumentSuppliedResources: (atend) %Pages: (atend) %BeginResource: procset Win35Dict 3 1 /Win35Dict 290 dict
Duke - EE - 164
GIGABIT ETHERNET DESIGN ECE164.02 - Spring 2004Presentation # 6Week Progress Summary Obtainedand Built Boards of our Design Tested Our Boards Verified Operation with Eye Diagrams Updated GANTT Chart Began Photodiode TestingGantt ChartPr
Elon - CIS - 211
Small-group discussion A consulting firm requires that all consultants use software that records their interactions with applications and files in order to help automate the client billing process.What are some of the security, privacy, and ethical
Duke - ECE - 135
Project GabE ECE 135 Spring 2005Final PresentationOmar Al-Jadda Patrick Crosby Adam Durity Rahmin SarabiProgress Report Builtfinal board design and verified Tx and verified Rx Testing Tested Tested LoopbackGantt ChartID 1 2 3 4 5 6 7
Duke - ECE - 4006
ECE4006 Group 6 Presentation 1Division of Labor Vikas Parekh Group management, project schedule manager, background studies. Gautum Khanna Analog design and testing for the receiver board. Akil Khamisi Sutton Part management, link
Duke - ECE - 4006
ECE4006 Group 6 Presentation 2 Overview This Week's AccomplishmentsNext Week's GoalsRevised Gantt Chart Optical Link Budget Website Built and Tested Evaluation Board Revised Gantt Chart Updated Optical Link BudgetSources: Tab
Duke - ECE - 4006
ECE 4006 Group 6Presentation 4 February 13, 2003Accomplishments & Goals Whats been done. Optical Link Budget Verified Schematic Verified Contacted Vendors and Ordered Parts Initial Transceiver Layout What needs to be done. Verify Layou
Duke - ECE - 4006
ECE4006 Group 6 Presentation 7 Overview Last WeekThis WeekAssembled First Fabrication Baseline Tests on Transmitter Completed Paper Continued Testing Anticipated PD Arrival First Run Layout First Run Soldered Board Pe
Duke - ECE - 4006
ECE4006 Final PresentationGroup 6, Spring 2003 Gigabit EthernetVikas ParekhGroup Management Plan Vikas Parekh Group manager, background research, scheduling and budgets. Theron Davis Webmaster, chief editor and solder expert. Domin
Duke - ECE - 4006
Gigabit Ethernet Design ECE 4006C Spring 2003Group 7 Presentation #2 Jed EatonJanuary 23rd, 2003Progress Report First Lab Session: Decipher Rx layout. Familiarized with lab tools. Important safety tips. Built and TestedReceiver Board Rea
Duke - ECE - 4006
Gigabit Ethernet Design ECE 4006C Spring 2003Group 7 Presentation #3 Pranjal ShahJanuary 30th, 2003Progress Report Optical Link Budget: VCSEL options narrowed to 2. Block diagram, started to fill in the numbers. Familiarization withoverall