261 EE Introduction to Logic Circuits Lecture #6
Agenda
1. 1's Complement 2. 2's Complement
Announcements
1. Read 2.6 - 2.9
EE 261 Introduction to Logic Circuits Fall 2008
Lecture #6 Page 1
1's Complement
1's Complement
- In 2's complement, the codes are asymmetric Lowest 2's Comp # = 1000 00002Comp = -12810 Highest 2's Comp # = 0111 11112Comp = +12710 - This is good because we have all 256 possible numbers that 8-bits can give us - 1's Comp is similar, but it gives us symmetry around Zero - To find the 1's Comp, we subtract current number from (rx -1) D1Comp = (rn -1) - Dorig
EE 261 Introduction to Logic Circuits Fall 2008
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1's Complement
1's Complement
- Or we can use the simple way 1) Complement all the #'s (Don't add 1) ex) Give the 8-bit, 1's complement representation of -1710 1710 = Step 1: 000100012 111011101Comp (Notice that the MSB is the sign bit, 0=+)
(complement all bits)
EE 261 Introduction to Logic Circuits Fall 2008
Lecture #6 Page 3
1's Complement
1's Complement Range
- The Range of 1's Complement is given by: -(2x-1 - 1) < NSM < (2x-1 -1) - Once again, we have two values for Zero 00000000 = +0 11111111 = -0
EE 261 Introduction to Logic Circuits Fall 2008
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Negative Numbers
Negative Representation
- We have covered 3 different "signed" codes - You need to KNOW THE CODE you are using ex) Represent -2210 1) Signed Magnitude : 10010110SM : 111010102Comp
2) 2's Complement
3) 1's Complement
: 111010011Comp
EE 261 Introduction to Logic Circuits Fall 2008
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2's Comp Arithmetic
Twos Compliment Arithmetic
- Two's complement has advantages when going into Hardware - Two's complement addition is straight forward because the numbers are in sequential order (+1) from their least significant (1000 0000 ) to their most significant (0111 1111) - There is only one value for Zero, so "avoiding gap" the isn't necessary
EE 261 Introduction to Logic Circuits Fall 2008
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2's Comp Arithmetic
Twos Compliment Addition
- Addition of twos compliment numbers is performed just like standard binary addition. - However, the carry bit is ignored
EE 261 Introduction to Logic Circuits Fall 2008
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2's Comp Arithmetic
Twos Compliment Subtraction
- We can build a subtraction circuit out of the same hardware as an adder - 2's Comp inherently adds negative numbers so - to subtract, we can just complement one number, and add it. ex) Subtract 8dec from 15dec 15dec = 0000 1111 8dec = 0000 1000 -> twos compliment -> invert add1 Now Add: 15 + (-8) = %0000 1111 %1111 1000 +_________ 1 0000 0111 = 7dec 1111 0111 + 1 ----------------1111 1000 = -8dec
Disregard Carry
EE 261 Introduction to Logic Circuits Fall 2008 Lecture #6 Page 8
2's Comp Arithmetic
Twos Compliment Overflow
- If a twos compliment arithmetic operation results in a number that is outside the range of representation (i.e., 8bits : -128 < N < +127), an overflow has occurred. ex) -100dec 100dec- = -200dec (cant represent) - Ther...