of Overview SHARC processor ADSP21061 Program Flow and other stuff
M. R. Smith, Electrical and Computer Engineering, University of Calgary, Alberta, Canada smithmr @ ucalgary.ca
To be tackled today
Reference sources Program Flow Some warnings of expected errors
Code review and code review standards
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Reference Sources
ADSP2106x SHARC User's Manual 2nd edition, Analog Devices provided to everybody ENCM515 SHARC Reference card ENCM515 Course, Reference and Laboratory Notes
See January 2004 web pages for link shows basic assembly language operations using simple animation
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SHARC Navigator Tutorial Tool
Check webpages for links to VisualDSP++, Compiler, Assembler, Linker and other tools Also see ECEADIProject (link from Dr. Smith Home Page)
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Picture Source
SHARC Navigator Tutorial Tool T. [e-mail] Talik Alukaidey Dept. of EEE Uninversity of Hertfordshire, Hatfield, U.K.
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ADSP-2106x Core Architecture
CACHE MEMORY 32 x 48
JTAG TEST & EMULATION FLAGS PROGRAM SEQUENCER TIMER
DAG 1 8 x 4 x 32
DAG 2 8 x 4 x 24
PMA BUS DMA BUS PMD BUS 48
24 PMA 32 DMA PMD
BUS CONNECT
DMD BUS
40
DMD
FLOATING & FIXED-POINT MULTIPLIER, FIXED-POINT ACCUMULATOR
REGISTER FILE 16 x 40
32-BIT BARREL SHIFTER
FLOATING-POINT & FIXED-POINT ALU
Processor Pipelines
CISC processor complex addressing modes less memory used for storing instructions ADSP2106X Any instruction that makes the processor pipelines (note plural) slow has been discarded.
Some instructions can be described in fewer bits than other instructions, and therefore can be combined with other instructions multifunction instructions
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Compute Unit Pipeline Memory Unit Pipeline Instruction Pipeline
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PIPELINE ISSUES
FETCH
R1 = R4 = R7 = R10 = R13 =
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DECODE
EXECUTE/ WRITEBAC K
R1 = R2 + R3
R1 = R4 = R7 = R10 = R1 = ASTAT SET R4 = ASTAT SET R7 = ASTAT SET ENCM515 Review of SHARC Processor
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R4 = R5 + R6 R7 = R8 + R9
R10 = R13 =
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PIPELINE ISSUES
FETCH
COMP R4 = R7 = R10 = R13 =
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DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2 )
COMP R4 = R7 = R10 = COMP AZ and AN set
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R4 = R5 + R6 R7 = R8 + R9
R4 = ASTAT SET R7 =
R10 = R13 =
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PIPELINE ISSUES JUMP NOT
TAKEN FETCH
COMP IF EQ R7 = R10 = COMP IF EQ COMP AZ and AN set
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DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2 ) IF EQ JUMP ELSE R7 = R8 + R9
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R7 = ENCM515 Review of SHARC Processor IF EQ
R10 =
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PIPELINE ISSUES JUMP TAKEN
FETCH
COMP IF EQ R7 = R10 = COMP IF EQ COMP AZ and AN set
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DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2 ) IF EQ JUMP ELSE R7 = R8 + R9
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R7 = ENCM515 Review of SHARC Processor IF EQ
R10 =
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PROGRAM FLOW CHANGES
PROGRAM FLOW CHANGES ARE TO BE AVOIDED IF YOU WANT TO HAVE PROGRAM SPEED
PROGRAMMING TECHNIQUES HARDWARE TECHNIQUES COMBO TECHNIQUES
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Program Flow
The obvious instructions
don't exist as such too destructive to program flow
JUMP JUMP to some new memory location to fetch the next instruction CALL Store the next instruction location (return address), then JUMP to some new memory location to fetch the next instruction
These instruction are treated as NOPs if the condition is FALSE
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IF condition JUMP and IF condition CALL do exist
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STANDARD IF THEN ELSE
IF (TEST) { CODE IF TEST IS TRUE; } ELSE { CODE IF TEST IS FALSE; }
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STANDARD IF THEN ELSE
Recode as TEST IF TEST IS FALSE JUMP ELSE CODE IF TEST IS TRUE; JUMP ENDIF ELSE: CODE IF TEST IS FALSE; ENDIF:
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IF (TEST) { CODE IF TEST IS TRUE;
} ELSE { CODE IF TEST IS FALSE; }
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STANDARD IF THEN ELSE
COMP(Fx, Fy); IF NE JUMP ELSE; CODE IF TEST IS TRUE; JUMP ENDIF; ELSE: CODE IF TEST IS FALSE; ENDIF:
IF (TEST) { CODE IF TEST IS TRUE;
} ELSE { CODE IF TEST IS FALSE; }
COURSE EXPECTATION CODE INDENTATION ENCM515 Review of SHARC Processor
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PIPELINE ISSUES TEST TRUE
FETCH
COMP IF NE R7 = JUMP ELSE: R13 COMP IF NE R7 = JUMP ELSE: R13 COMP AZ and AN set IF NE R7 = ASTAT SET
DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2) IF NE JUMP ELSE R7 = R8 + R9
JUMP ENDIF ELSE: R13 =
R1 =
ENDIF: R7 =
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JUMP
ELSE: R13
R1 = ENDIF: R7 =
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R1 = ENDIF: R7 =
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R1 =
ENDIF: R7 =
PIPELINE ISSUES TEST FALSE
FETCH
COMP IF NE R7 = JUMP ELSE: R13 COMP IF NE R7 = JUMP ELSE: R13 COMP AZ and AN set IF NE R7 = ASTAT SET
DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2) IF NE JUMP ELSE R7 = R8 + R9
JUMP ENDIF ELSE: R13 =
R1 =
ENDIF: R7 =
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JUMP
ELSE: R13
R1 = ENDIF: R7 =
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R1 = ENDIF: R7 =
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R1 =
ENDIF: R7 =
Efficient ifthenelse
Efficient coding practices be to demonstrated in this course Efficient coding practices change depending on algorithm being used What looks efficient may not be If (R1 ==R2) R3 = 0; else R3 = 1;
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PIPELINE ISSUES TEST TRUE
FETCH
COMP IF NE R3 = 0 JUMP ELSE: R3 = 1 COMP IF NE R3 = 0 JUMP ELSE: R13 COMP AZ and AN set IF NE JUMP R3 = 0 ASTAT SET
DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2) IF NE JUMP ELSE R3 = 0
JUMP ENDIF ELSE: R3 = 1;
ENDIF:
ENDIF: R7 =
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JUMP
ELSE: R13
ENDIF: R7 = Refetched
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ENDIF:
ENDIF: R7 =
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ENDIF:
ENDIF: R7 =
PIPELINE ISSUES TEST FALSE
FETCH
COMP IF NE R3 = 0 JUMP ELSE: R3 = 1 COMP IF NE R3 = 0 JUMP ELSE: R13 COMP AZ and AN set IF NE R3 = 0ASTAT SET
DECODE
EXECUTE/ WRITEBAC K
COMP(R1,R2) IF NE JUMP ELSE R3 = 0
JUMP ENDIF ELSE: R3 = 1;
ENDIF:
JUMP
ELSE: R13
ENDIF: R7 =
ENDIF:
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ENDIF:
7 to endif 20 / 33 completion
KNOW YOUR CODE PATH
NE MOST OFTEN
EQ MOST OFTEN
Code as If (R1 ==R2) R3 = 0; else R3 = 1;
Code as If (R1 != R2) R3 = 1; else R3 = 0;
FASTER IN THIS CASE
FASTER IN THIS CASE
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Other alternatives
R3 = 1; IF (R1 == R2) R3 = 0;
Standard approach
R3 = 1; COMP(R1, R2); IF NE JUMP ENDIF; R3 = 0; ENDIF: Avoid a JUMP since do the else condition whether needed or not
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DO pipeline trace
IF JUMP TAKEN
F D E/W
IF JUMP NOT TAKEN
F D E/W
R3=
COMP
R3=
COMP
IF JUM P
IF JUM P
R3=
ENDIF
R3=
ENDIF
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Other alternatives
R3 = 1; IF (R1 == R2) R3 = 0;
21061 approach
Use IF COMPUTE
R3 = 1; COMP(R1, R2); IF EQ R3 = R3 R3;
Avoids 2 JUMPs
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DO pipeline trace
IF TRUE
F D E/W
IF FALSE
F D E/W
R3=
COMP
R3=
COMP
IF COM PUT E
ENDIF
IF COM PUT E
ENDIF
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Why is this not allowed?
IF EQ R3 = R3 R3; is okay BUT
IF EQ R3 = 0; is illegal
IF EQ COMPUTE is the instruction format
R3 = R3 R3; is a compute operation (23 bit) R3 = 0; is a UREG operation using a 32 bit constant illegal
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Allowed or not?
IF EQ R3 = (R2 + R2) / 2; is okay IF EQ R3 = MIN(R2, R2); is okay BUT
IF EQ R3 = R2; is not a valid compute operation
IF EQ COMPUTE is the instruction format
R3 = (R2 + R2)/2 ; and R3 = PASS R2; are compute operations (23 bit) R3 = R2; is a UREG operation using a second UREG BUT IT IS ALLOWED How to check put instruction or instruction sequence through a project building project (Assemble and link);
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SHARC Program Flow
IF condition JUMP <addr24> (DB/LA/CI); (PC, <reladdr24>) (DB/LA/CI); IF condition CALL <addr24> (DB); (PC, <reladdr24> (DB); IF condition JUMP (Md, Ic) (DB/LA/CI), compute; (PC, &...