Lab CSE115 7 Introduction
Spring 2009you will create a simple circuit simulator. You will first build gate simulators for AND, OR In this lab
and NOT gates. Then you will build gate simulators from these basic gates for some other useful gates. Finally, you will build more complex circuits, like an ADDER. You have TWO WEEKS to complete this lab. NOTE: At this point the description only reveals what you need to do for the first week.
Objectives
The high-level objectives of this lab are to have you,
build a complete program with minimal constraints work with Boolean operators model physical components in software
Lab Tasks
At your lab session your teaching assistant will briefly discuss what you must do in the lab, and answer any questions you may have.
Step 1: Log in Step 2: Start Eclipse Step 3: Submit your lab 6 work Step 4: Do the lab! To successfully complete this lab, we recommend that you follow the steps below, in the given order.
Step 4.1: Check out the SP09-CSE116-Lab7 project from the repository Check out the SP09-CSE115-Lab7 project from the labs repository. There is one file in the project: Circuit.java Circuit is an interface which specifies one method: public boolean value();
When called this method should return the output of the circuit given its inputs. Step 4.2: Define a NOT gate A Not gate has a single input. In its value method, the Not class must return the negation of its inputs value. The relationship between Not and Circuit is shown by the UML diagram below:
Notice the presence of an association relationship. When defining the Not class, first draw the UML diagram using green to see what you have available in the class. The only thing you will need to do after drawing the diagram is define the value method. Remember that a Not gate returns the negation of its input value, and that in Java Boolean negation is expressed using !. Step 4.3: Define a Switch It will be convenient to have a Switch defined as a type of Circuit. A Switch is a special Circuit whose value can be set to either true or false, by calling its public void on() or public void off() methods, respectively.
Step 4.4: Test the Not gate In the DrJava interactions pane, create a Switch and a Not gate. Make the the Switch input to the Not gate. Check that the value of the Not gate is true if the Switch is off, and false if the Switch is on. Heres a sample interaction: Welcome to DrJava. > lab7.Switch s = new lab7.Switch(); > s.off(); > s.value() false > s.on(); > s.value() true > lab7.Not n = new lab7.Not(s); > n.value() false > s.off(); > n.value() true Step 4.5: Define and test an And gate An And gate has two inputs. In its value method, the And class must return the conjunction of its inputs value, expressed in Java using the && operator. The relationship between And and Circuit is shown by the UML diagram below:
Next you should test your And gate. In the DrJava interactions pane, create two Switches and an And gate. Make the two Switches the inputs to the And gate. Check that the value of the And gate is true if both Switches are on, and false otherwise. Step 4.6: Define and test an Or gate An Or gate has two inputs. In its value method, the Or class must return the disjunction of its inputs value, expressed in Java using the || operator. The relationship between Or and Circuit is shown by the UML diagram below:
Next you should test your Or gate. In the DrJava interactions pane, create two Switches and an Or gate. Make the two Switches the inputs to the Or gate. Check that the value of the Or gate is false if both Switches are off, and true otherwise. Step 4.7: Define and test an Xor gate Finally for this week, define and test an Xor gate. An Xor gate is an exclusive or gate. The output of this gate is true if either of its inputs are true, but false if both or neither of its inputs are true. There are in fact many ways to build an Xor gate; heres one:
Step 4.8: Next week Next week you will build a simulator for a circuit called a Full Adder, which adds two bits and computes a carry bit. You will then use this 1-bit Full Adder to build a larger adder, which can add two binary numbers of some set width (e.g. 3 bits). More details will be provided in recitation next week.
Due dates
You must submit your work for this lab no later than the start of your recitation the week of April 14 April 17. The assignment will be open for submission no earlier than Monday April 13.