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Course: EE 525, Fall 2009
School: Carnegie Mellon
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Machine E-Voting - Design Presentation Group M1 Mon. Sept 8 Initial Design Jessica Kim Chi Ho Yoon Jonathan Chiang Donald Cober Secure Electronic Voting Terminal Status Finished: Design selections Block diagram for processes To Do: Verilog Schematic Layout Testing Simulation Design Decisions Project Overview: Implement an ASIC with most core functions of an electronic voting machine Must be...

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Machine E-Voting - Design Presentation Group M1 Mon. Sept 8 Initial Design Jessica Kim Chi Ho Yoon Jonathan Chiang Donald Cober Secure Electronic Voting Terminal Status Finished: Design selections Block diagram for processes To Do: Verilog Schematic Layout Testing Simulation Design Decisions Project Overview: Implement an ASIC with most core functions of an electronic voting machine Must be secure Must be configurable and marketable for all national, state and local voting events. System Specifications M ain Computer: Only Interacts with poll workers Stores all of the votes from the terminals Handles all identification and verification Communicates all errors and events to the poll workers Accumulates and tallies all results Watches for terminal malfunction or tampering Main Terminals: ATM-style user interface for voter " dumb" Only stores the current information for the voter Is programmed with choices physically with flash storage medium (rather than over a network) Terminal Specifications Each terminal is equipped with: LCD display Array of selection input buttons Keyboard for write-in candidate selection Printer for physical paper trail Card scanner for ID Fingerprint scanner for security theatre Encrypted 2-way communication line to the main computer Tamper detection devices Chip Specifications Interfaces to the card reader, display, printer, fingerprint scanner and flash will be on an 8bit wide bus with a data clock signal. Additional functionality like card detection and display mode will be asserted over 1bit wide signal lines. Most device interfaces will external be to the chip. Chip will contain the state machines needed to control all of the peripherals and the SRAM to store all of the current user' s selections. Communications will be encrypted with the TEA algorithm Block Layout Card Reader ID Verification FSM Fingerprint scanner MUX DEMUX Selection Display FSM Display Confirmation FSM SRAM Printer Buttons Communication Parallel/Serial Shift (64bit) Decryption MUX DEMUX Encryption Flash Blocks I tem ID Verification FSM Selection Display FSM Description Size Reads the ID from a mag-strip card and collects the 1000 transistors fingerprint ID. Information is sent to the main computer for verification by the poll workers and an ID confirmation page is displayed for the voter. Sends the current voting page and the listed choices 1000 transistors to the display and interprets button input. Selections can be made and basic page navigation is available. Also handles a simplified keyboard interface for write-in candidate...

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