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ADXL202_10_b

Course: CS 466, Fall 2009
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2-Axis a FEATURES Acceleration Sensor on a Single IC Chip Measures Static Acceleration as Well as Dynamic Acceleration Duty Cycle Output with User Adjustable Period Low Power <0.6 mA Faster Response than Electrolytic, Mercury or Thermal Tilt Sensors Bandwidth Adjustment with a Single Capacitor Per Axis 5 m g Resolution at 60 Hz Bandwidth +3 V to +5.25 V Single Supply Operation 1000 g Shock Survival...

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2-Axis a FEATURES Acceleration Sensor on a Single IC Chip Measures Static Acceleration as Well as Dynamic Acceleration Duty Cycle Output with User Adjustable Period Low Power <0.6 mA Faster Response than Electrolytic, Mercury or Thermal Tilt Sensors Bandwidth Adjustment with a Single Capacitor Per Axis 5 m g Resolution at 60 Hz Bandwidth +3 V to +5.25 V Single Supply Operation 1000 g Shock Survival APPLICATIONS 2-Axis Tilt Sensing Computer Peripherals Inertial Navigation Seismic Monitoring Vehicle Security Systems Battery Powered Motion Sensing Low Cost 2 g/ 10 g Dual Axis iMEMS Accelerometers with Digital Output ADXL202/ADXL210 GENERAL DESCRIPTION The ADXL202/ADXL210 are low cost, low power, complete 2-axis accelerometers with a measurement range of either 2 g/ 10 g. The ADXL202/ADXL210 can measure both dynamic acceleration (e.g., vibration) and static acceleration (e.g., gravity). The outputs are digital signals whose duty cycles (ratio of pulsewidth to period) are proportional to the acceleration in each of the 2 sensitive axes. These outputs may be measured directly with a microprocessor counter, requiring no A/D converter or glue logic. The output period is adjustable from 0.5 ms to 10 ms via a single resistor (RSET ). If a voltage output is desired, a voltage output proportional to acceleration is available from the XFILT and YFILT pins, or may be reconstructed by filtering the duty cycle outputs. The bandwidth of the ADXL202/ADXL210 may be set from 0.01 Hz to 5 kHz via capacitors CX and C Y. The typical noise floor is 500 g/Hz allowing signals below 5 mg to be resolved for bandwidths below 60 Hz. The ADXL202/ADXL210 is available in a hermetic 14-lead Surface Mount CERPAK, specified over the 0C to +70C commercial or 40C to +85C industrial temperature range. FUNCTIONAL BLOCK DIAGRAM +3.0V TO +5.25V CX VDD VDD XFILT SELF TEST X SENSOR CDC DEMOD RFILT 32k ADXL202/ ADXL210 X OUT DUTY CYCLE MODULATOR (DCM) C O U N T E R OSCILLATOR RFILT 32k DEMOD Y SENSOR P Y OUT COM YFILT CY T2 RSET T2 T1 A(g) = (T1/T2 0.5)/12.5% 0g = 50% DUTY CYCLE T2 = RSET/125M iMEMS is a registered trademark of Analog Devices, Inc. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. AIN2 = One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 Analog Devices, Inc., 1999 , T = +25 for ADXL202/ADXL210SPECIFICATIONS (T ==T125tok T , AccelerationC = 0 JgGrade only, V = +5 V, R , unless otherwise noted) A MIN MAX A DD SET Parameter SENSOR INPUT Measurement Range 1 Nonlinearity Alignment Error 2 Alignment Error Transverse Sensitivity 3 SENSITIVITY Duty Cycle per g Sensitivity, Analog Output Temperature Drift 4 ZERO g BIAS LEVEL 0 g Duty Cycle Initial Offset 0 g Duty Cycle vs. Supply 0 g Offset vs. Temperature 4 NOISE PERFORMANCE Noise Density5 FREQUENCY RESPONSE 3 dB Bandwidth 3 dB Bandwidth Sensor Resonant Frequency FILTER RFILT Tolerance Minimum Capacitance SELF TEST Duty Cycle Change DUTY CYCLE OUTPUT STAGE FSET FSET Tolerance Output High Voltage Output Low Voltage T2 Drift vs. Temperature Rise/Fall Time POWER SUPPLY Operating Voltage Range Specified Performance Quiescent Supply Current Turn-On Time6 TEMPERATURE RANGE Operating Range Specified Performance Conditions Each Axis Best Fit Straight Line X Sensor to Y Sensor Each Axis T1/T2 @ +25C At Pins XFILT, YFILT from +25C Each Axis T1/T2 from +25C @ +25C Duty Cycle Output At Pins XFILT, YFILT ADXL202/JQC/AQC Min Typ Max 1.5 2 0.2 1 0.01 2 12.5 312 0.5 50 2 1.0 2.0 500 500 5 10 15 1000 10 125 M/RSET 0.7 VS 200 mV 35 200 3.0 4.75 5.25 5.25 1.0 15 ADXL210/JQC/AQC Min Typ Max 8 10 0.2 1 0.01 2 4.0 100 0.5 50 2 1.0 2.0 500 500 5 14 15 1000 10 125 M/RSET 0.7 VS 200 mV 35 200 2.7 4.75 0.6 160 CFILT + 0.3 0 40 5.25 5.25 1.0 4.8 Units g % of FS Degrees Degrees % %/g mV/g % Rdg % g %/V mg/C g/Hz Hz kHz kHz % pF % 10 3.2 25 75 4.0 42 58 4.0 1000 1000 32 k Nominal At XFILT, YFILT Self-Test 0 to 1 RSET = 125 k I = 25 A I = 25 A 1.3 200 1.3 200 kHz mV mV ppm/C ns V V mA ms C C To 99% JQC AQC 0 40 0.6 160 CFILT + 0.3 +70 +85 +70 +85 NOTES 1 For all combinations of offset and sensitivity variation. 2 Alignment error is specified as the angle between the true and indicated axis of sensitivity. 3 Transverse sensitivity is the algebraic sum of the alignment and the inherent sensitivity errors. 4 Specification refers to the maximum change in parameter from its initial at +25 C to its worst case value at T MIN to T MAX . 5 Noise density (g/Hz) is the average noise at any frequency in the bandwidth of the part. 6 CFILT in F. Addition of filter capacitor will increase turn on time. Please see the Application section on power cycling. All min and max specifications are guaranteed. Typical specifications are not tested or guaranteed. Specifications subject to change without notice. 2 REV. B ADXL202/ADXL210 ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATION Acceleration (Any Axis, Unpowered for 0.5 ms) . . . . . . 1000 g Acceleration (Any Axis, Powered for 0.5 ms) . . . . . . . . . 500 g +VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7.0 V Output Short Circuit Duration (Any Pin to Common) . . . . . . . . . . . . . . . . . . . . . . Indefinite Operating Temperature . . . . . . . . . . . . . . . . . 55C to +125C Storage Temperature . . . . . . . . . . . . . . . . . . . 65C to +150C *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. NC 1 VTP 2 ST 3 14 VDD 12 XFILT TOP VIEW COM 4 (Not to Scale) 11 YFILT T2 5 NC 6 COM 7 AY AX 10 XOUT 9 YOUT 8 NC ADXL202/ ADXL210 13 VDD NC = NO CONNECT Drops onto hard surfaces can cause shocks of greater than 1000 g and exceed the absolute maximum rating of the device. Care should be exercised in handling to avoid damage. PIN FUNCTION DESCRIPTIONS Figure 1 shows the response of the ADXL202 to the Earths gravitational field. The output values shown are nominal. They are presented to show the user what type of response to expect from each of the output pins due to changes in orientation with respect to the Earth. The ADXL210 reacts similarly with output changes appropriate to its scale. TYPICAL OUTPUT AT PIN: 9 = 50% DUTY CYCLE 10 = 62.5% DUTY CYCLE 11 = 2.5V 12 = 2.188V Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name NC VTP ST COM T2 NC COM NC YOUT XOUT YFILT XFILT VDD VDD Description No Connect Test Point, Do Not Connect Self Test Common Connect RSET to Set T2 Period No Connect Common No Connect Y Axis Duty Cycle Output X Axis Duty Cycle Output Connect Capacitor for Y Filter Connect Capacitor for X Filter +3 V to +5.25 V, Connect to 14 +3 V to +5.25 V, Connect to 13 TYPICAL OUTPUT AT PIN: 9 = 37.5% DUTY CYCLE 10 = 50% DUTY CYCLE 11 = 2.812V 12 = 2.5V TYPICAL OUTPUT AT PIN: 9 = 62.5% DUTY CYCLE 10 = 50% DUTY CYCLE 11 = 2.188V 12 = 2.5V 1g TYPICAL OUTPUT AT PIN: 9 = 50% DUTY CYCLE 10 = 37.5% DUTY CYCLE 11 = 2.5V 12 = 2.812V EARTH'S SURFACE PACKAGE CHARACTERISTICS Package 14-Lead CERPAK JA JC Device Weight 5 Grams 110C/W 30C/W Figure 1. ADXL202/ADXL210 Nominal Response Due to Gravity ORDERING GUIDE Model ADXL202JQC ADXL202AQC ADXL210JQC ADXL210AQC g Range 2 2 10 10 Temperature Range 0C to +70C 40C to +85C 0C to +70C 40C to +85C Package Description 14-Lead CERPAK 14-Lead CERPAK 14-Lead CERPAK 14-Lead CERPAK Package Option QC-14 QC-14 QC-14 QC-14 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADXL202/ADXL210 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. B 3 ADXL202/ADXL210 TYPICAL CHARACTERISTICS 1.06 PERIOD NORMALIZED TO 1 AT 25 C 1.04 CHANGE IN SENSITIVITY 30 15 0 15 30 45 TEMPERATURE C 60 75 90 (@ +25 C RSET = 125 k , VDD = +5 V, unless otherwise noted) 4% 3% 2% 1% 0% 1% 2% 3% 1.02 1.00 0.98 0.96 0.94 45 4% 40 25 TEMPERATURE C 85 Figure 2. Normalized DCM Period (T2) vs. Temperature Figure 5. Typical X Axis Sensitivity Drift Due to Temperature 0.8 0.6 ZERO g OFFSET SHIFT IN g 0.4 0.2 0 0.2 0.4 0.6 0.8 40 30 20 10 0 2 CFILT = 0.01 F 3 VOLTS 1 0 10 20 30 40 50 TEMPERATURE C 60 70 80 90 0 0.4 0.8 FREQUENCY ms 1.2 1.4 Figure 3. Typical Zero g Offset vs. Temperature Figure 6. Typical Turn-On Time 0.7 0.6 SUPPLY CURRENT mA 20 18 VS = 5 VDC PERCENTAGE OF SAMPLES 100 16 14 12 10 8 6 4 2 20 0 20 40 60 80 0 0.87g 0.64g 0.41g 0.17g 0.06g 0.29g g/DUTY CYCLE OUTPUT 0.52g 0.75g 0.5 VS = 3.5 VDC 0.4 0.3 0.2 0.1 0 40 TEMPERATURE C Figure 4. Typical Supply Current vs. Temperature Figure 7. Typical Zero g Distribution at +25C 4 REV. B ADXL202/ADXL210 9 8 12 PERCENTAGE OF SAMPLES 7 6 5 4 3 2 1 0 11.3 11.5 11.7 11.9 12.2 12.4 12.6 12.8 13.1 13.3 13.5 13.7 DUTY CYCLE OUTPUT % per g TOTAL RMS NOISE mg 10 8 6 CFILT = 0.047 F BW = 100Hz CFILT = 0.1 F BW = 50Hz CFILT = 0.47 F BW = 10Hz 14 CFILT = 0.01 F BW = 500Hz T2 = 1ms 4 2 0 1 4 16 NUMBER OF AVERAGE SAMPLES 64 Figure 8. Typical Sensitivity per g at +25 C Figure 10. Typical Noise at Digital Outputs 14 12 20 18 16 TOTAL RMS NOISE mg 10 % OF PARTS 8 6 14 12 10 8 6 4 4 2 0 0.01 F 500Hz 2 0.0125 0.0125 0.625 1.375 1.125 0.875 0.625 0.375 0.375 0.875 1.125 1.375 0 0.047 F 100Hz 0.1 F 50Hz 0.47 F 10Hz CX, CY BANDWIDTH DEGREES OF MISALIGNMENT Figure 9. Typical Noise at XFILT Output Figure 11. Rotational Die Alignment REV. B 5 ADXL202/ADXL210 DEFINITIONS APPLICATIONS POWER SUPPLY DECOUPLING T1 Length of the on portion of the cycle. T2 Length of the total cycle. Duty Cycle Ratio of the on time (T1) of the cycle to the total cycle (T2). Defined as T1/T2 for the ADXL202/ ADXL210. Pulsewidth Time period of the on pulse. Defined as T1 for the ADXL202/ADXL210. THEORY OF OPERATION The ADXL202/ADXL210 are complete dual axis acceleration measurement systems on a single monolithic IC. They contain a polysilicon surface-micromachined sensor and signal conditioning circuitry to implement an open loop acceleration measurement architecture. For each axis, an output circuit converts the analog signal to a duty cycle modulated (DCM) digital signal that can be decoded with a counter/timer port on a microprocessor. The ADXL202/ADXL210 are capable of measuring both positive and negative accelerations to a maximum level of 2 g or 10 g. The accelerometer measures static acceleration forces such as gravity, allowing it to be used as a tilt sensor. The sensor is a surface micromachined polysilicon structure built on top of the silicon wafer. Polysilicon springs suspend the structure over the surface of the wafer and provide a resistance against acceleration forces. Deflection of the structure is measured using a differential capacitor that consists of independent fixed plates and central plates attached to the moving mass. The fixed plates are driven by 180 out of phase square waves. An acceleration will deflect the beam and unbalance the differential capacitor, resulting in an output square wave whose amplitude is proportional to acceleration. Phase sensitive demodulation techniques are then used to rectify the signal and determine the direction of the acceleration. The output of the demodulator drives a duty cycle modulator (DCM) stage through a 32 k resistor. At this point a pin is available on each channel to allow the user to set the signal bandwidth of the device by adding a capacitor. This filtering improves measurement resolution and helps prevent aliasing. After being low-pass filtered, the analog signal is converted to a duty cycle modulated signal by the DCM stage. A single resistor sets the period for a complete cycle (T2), which can be set between 0.5 ms and 10 ms (see Figure 12). A 0 g acceleration produces a nominally 50% duty cycle. The acceleration signal can be determined by measuring the length of the T1 and T2 pulses with a counter/timer or with a polling loop using a low cost microcontroller. An analog output voltage can be obtained either by buffering the signal from the XFILT and YFILT pin, or by passing the duty cycle signal through an RC filter to reconstruct the dc value. The ADXL202/ADXL210 will operate with supply voltages as low as 3.0 V or as high as 5.25 V. T2 T1 A(g) = (T1/T2 0.5)/12.5% 0g = 50% DUTY CYCLE T2(s) = RSET( )/125M For most applications a single 0.1 F capacitor, CDC , will adequately decouple the accelerometer from signal and noise on the power supply. However, in some cases, especially where digital devices such as microcontrollers share the same power supply, digital noise on the supply may cause interference on the ADXL202/ ADXL210 output. This is often observed as a slowly undulating fluctuation of voltage at XFILT and YFILT. If additional decoupling is needed, a 100 (or smaller) resistor or ferrite beads, may be inserted in the ADXL202/ADXL210s supply line. DESIGN PROCEDURE FOR THE ADXL202/ADXL210 The design procedure for using the ADXL202/ADXL210 with a duty cycle output involves selecting a duty cycle period and a filter capacitor. A proper design will take into account the application requirements for bandwidth, signal resolution and acquisition time, as discussed in the following sections. VDD The ADXL202/ADXL210 have two power supply (VDD) Pins: 13 and 14. These two pins should be connected directly together. COM The ADXL202/ADXL210 have two commons, Pins 4 and 7. These two pins should be connected directly together and Pin 7 grounded. VTP This pin is to be left open; make no connections of any kind to this pin. A 0.1 F capacitor is recommended from VDD to COM for power supply decoupling. ST Decoupling Capacitor C DC The ST pin controls the self-test feature. When this pin is set to VDD, an electrostatic force is exerted on the beam of the accelerometer. The resulting movement of the beam allows the user to test if the accelerometer is functional. The typical change in output will be 10% at the duty cycle outputs (corresponding to 800 mg). This pin may be left open circuit or connected to common in normal use. Duty Cycle Decoding The ADXL202/ADXL210s digital output is a duty cycle modulator. Acceleration is proportional to the ratio T1/T2. The nominal output of the ADXL202 is: 0 g = 50% Duty Cycle Scale factor is 12.5% Duty Cycle Change per g The nominal output of the ADXL210 is: 0 g = 50% Duty Cycle Scale factor is 4% Duty Cycle Change per g These nominal values are affected by the initial tolerance of the device including zero g offset error and sensitivity error. T2 does not have to be measured for every measurement cycle. It need only be updated to account for changes due to temperature, (a relatively slow process). Since the T2 time period is shared by both X and Y channels, it is necessary only to measure it on one channel of the ADXL202/ADXL210. Decoding algorithms for various microcontrollers have been developed. Consult the appropriate Application 6 Note. REV. B Figure 12. Typical Output Duty Cycle ADXL202/ADXL210 +3.0V TO +5.25V CX VDD VDD XFILT SELF TEST X SENSOR CDC DEMOD RFILT 32k ADXL202/ ADXL210 X OUT DUTY CYCLE MODULATOR (DCM) Y OUT C O U N T E R T1 P A(g) = (T1/T2 0.5)/12.5% 0g = 50% DUTY CYCLE T2 = RSET/125M T2 OSCILLATOR RFILT 32k DEMOD Y SENSOR YFILT CY COM T2 RSET Figure 13. Block Diagram Setting the Bandwidth Using C X and CY Table II. Resistor Values to Set T2 The ADXL202/ADXL210 have provisions for bandlimiting the XFILT and YFILT pins. Capacitors must be added at these pins to implement low-pass filtering for antialiasing and noise reduction. The equation for the 3 dB bandwidth is: F 3 dB = T2 1 ms 2 ms 5 ms 10 ms RSET 125 k 250 k 625 k 1.25 M (2 (32 k) C(x, y)) 1 or, more simply, F 3 dB 5 F = C(X ,Y ) The tolerance of the internal resistor (RFILT), can vary as much as 25% of its nominal value of 32 k; so the bandwidth will vary accordingly. A minimum capacitance of 1000 pF for C(X, Y) is required in all cases. Table I. Filter Capacitor Selection, CX and CY Note that the RSET should always be included, even if only an analog output is desired. Use an RSET value between 500 k and 2 M when taking the output from XFILT or YFILT. The RSET resistor should be place close to the T2 Pin to minimize parasitic capacitance at this node. Selecting the Right Accelerometer Bandwidth 10 Hz 50 Hz 100 Hz 200 Hz 500 Hz 5 kHz Setting the DCM Period with R SET Capacitor Value 0.47 F 0.10 F 0.05 F 0.027 F 0.01 F 0.001 F For most tilt sensing applications the ADXL202 is the most appropriate accelerometer. Its higher sensitivity (12.5%/g allows the user to use a lower speed counter for PWM decoding while maintaining high resolution. The ADXL210 should be used in applications where accelerations of greater than 2 g are expected. MICROCOMPUTER INTERFACES The ADXL202/ADXL210 were specifically designed to work with low cost microcontrollers. Specific code sets, reference designs, and application notes are available from the factory. This section will outline a general design procedure and discuss the various trade-offs that need to be considered. The designer should have some idea of the required performance of the system in terms of: Resolution: the smallest signal change that needs to be detected. Bandwidth: the highest frequency that needs to be detected. Acquisition Time: the time that will be available to acquire the signal on each axis. These requirements will help to determine the accelerometer bandwidth, the speed of the microcontroller clock and the length of the T2 period. When selecting a microcontroller it is helpful to have a counter timer port available. The microcontroller should have provisions for software calibration. While the ADXL202/ADXL210 are highly accurate accelerometers, they have a wide tolerance for 7 The period of the DCM output is set for both channels by a single resistor from RSET to ground. The equation for the period is: T2 = RSET () 125 M A 125 k resistor will set the duty cycle repetition rate to approximately 1 kHz, or 1 ms. The device is designed to operate at duty cycle periods between 0.5 ms and 10 ms. REV. B ADXL202/ADXL210 initial offset. The easiest way to null this offset is with a calibration factor saved on the microcontroller or by a user calibration for zero g. In the case where the offset is calibrated during manufacture, there are several options, including external EEPROM and microcontrollers with one-time programmable features. DESIGN TRADE-OFFS FOR SELECTING FILTER CHARACTERISTICS: THE NOISE/BW TRADE-OFF Table IV gives typical noise output of the ADXL202/ADXL210 for various CX and C Y values. Table IV. Filter Capacitor Selection, C X and CY Bandwidth 10 Hz 50 Hz 100 Hz 200 Hz 500 Hz CX , CY 0.47 F 0.10 F 0.05 F 0.027 F 0.01 F rms Noise 1.9 mg 4.3 mg 6.1 mg 8.7 mg 13.7 mg Peak-to-Peak Noise Estimate 95% Probability (rms 4) 7.6 mg 17.2 mg 24.4 mg 35.8 mg 54.8 mg The accelerometer bandwidth selected will determine the measurement resolution (smallest detectable acceleration). Filtering can be used to lower the noise floor and improve the resolution of the accelerometer. Resolution is dependent on both the analog filter bandwidth at XFILT and YFILT and on the speed of the microcontroller counter. The analog output of the ADXL202/ADXL210 has a typical bandwidth of 5 kHz, much higher than the duty cycle stage is capable of converting. The user must filter the signal at this point to limit aliasing errors. To minimize DCM errors the analog bandwidth should be less than 1/10 the DCM frequency. Analog bandwidth may be increased to up to 1/2 the DCM frequency in many applications. This will result in greater dynamic error generated at the DCM. The analog bandwidth may be further decreased to reduce noise and improve resolution. The ADXL202/ADXL210 noise has the characteristics of white Gaussian noise that contributes equally at all frequencies and is described in terms of g per root Hz; i.e., the noise is proportional to the square root of the bandwidth of the accelerometer. It is recommended that the user limit bandwidth to the lowest frequency needed by the application, to maximize the resolution and dynamic range of the accelerometer. With the single pole roll-off characteristic, the typical noise of the ADXL202/ADXL210 is determined by the following equation: Noise rms = 500 g / Hz BW 1.5 At 100 Hz the noise will be: Noise rms = 500 g / Hz 100 (1.5) = 6.12 mg Often the peak value of the noise is desired. Peak-to-peak noise can only be estimated by statistical methods. Table III is useful for estimating the probabilities of exceeding various peak values, given the rms value. Table III. Estimation of Peak-to-Peak Noise CHOOSING T2 AND COUNTER FREQUENCY: DESIGN TRADE-OFFS The noise level is one determinant of accelerometer resolution. The second relates to the measurement resolution of the counter when decoding the duty cycle output. The ADXL202/ADXL210s duty cycle converter has a resolution of approximately 14 bits; better resolution than the accelerometer itself. The actual resolution of the acceleration signal is, however, limited by the time resolution of the counting devices used to decode the duty cycle. The faster the counter clock, the higher the resolution of the duty cycle and the shorter the T2 period can be for a given resolution. The following table shows some of the trade-offs. It is important to note that this is the resolution due to the microprocessorss counter. It is probable that the accelerometers noise floor may set the lower limit on the resolution, as discussed in the previous section. Table V. Trade-Offs Between Microcontroller Counter Rate, T2 Period and Resolution of Duty Cycle Modulator ADXL202/ ADXL210 RSET Sample T2 (ms) (k ) Rate 1.0 1.0 1.0 5.0 5.0 5.0 10.0 10.0 10.0 124 124 124 625 625 625 1250 1250 1250 1000 1000 1000 200 200 200 100 100 100 CounterClock Counts Rate per T2 Counts Resolution (MHz) Cycle per g (mg) 2.0 1.0 0.5 2.0 1.0 0.5 2.0 1.0 0.5 2000 1000 500 10000 5000 2500 20000 10000 5000 250 125 62.5 1250 625 312.5 2500 1250 625 4.0 8.0 16.0 0.8 1.6 3.2 0.4 0.8 1.6 ( ) ( ) Nominal Peak-to-Peak Value 2.0 rms 4.0 rms 6.0 rms 8.0 rms % of Time that Noise Will Exceed Nominal Peak-to-Peak Value 32% 4.6% 0.27% 0.006% The peak-to-peak noise value will give the best estimate of the uncertainty in a single measurement. 8 REV. B ADXL202/ADXL210 STRATEGIES FOR USING THE DUTY CYCLE OUTPUT WITH MICROCONTROLLERS A DUAL AXIS TILT SENSOR: CONVERTING ACCELERATION TO TILT Application notes outlining various strategies for using the duty cycle output with low cost microcontrollers are available from the factory. USING THE ADXL202/ADXL210 AS A DUAL AXIS TILT SENSOR When the accelerometer is oriented so both its X and Y axes are parallel to the earths surface it can be used as a two axis tilt sensor with a roll and a pitch axis. Once the output signal from the accelerometer has been converted to an acceleration that varies between 1 g and +1 g, the output tilt in degrees is calculated as follows: Pitch = ASIN (Ax/1 g) Roll = ASIN (Ay/1 g) Be sure to account for overranges. It is possible for the accelerometers to output a signal greater than 1 g due to vibration, shock or other accelerations. MEASURING 360 OF TILT One of the most popular applications of the ADXL202/ADXL210 is tilt measurement. An accelerometer uses the force of gravity as an input vector to determine orientation of an object in space. An accelerometer is most sensitive to tilt when its sensitive axis is perpendicular to the force of gravity, i.e., parallel to the earths surface. At this orientation its sensitivity to changes in tilt is highest. When the accelerometer is oriented on axis to gravity, i.e., near its +1 g or 1 g reading, the change in output acceleration per degree of tilt is negligible. When the accelerometer is perpendicular to gravity, its output will change nearly 17.5 mg per degree of tilt, but at 45 degrees it is changing only at 12.2 mg per degree and resolution declines. The following table illustrates the changes in the X and Y axes as the device is tilted 90 through gravity. +90 Y 0 X 90 1g It is possible to measure a full 360 of orientation through gravity by using two accelerometers oriented perpendicular to one another (see Figure 15). When one sensor is reading a maximum change in output per degree, the other is at its ...

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Case 5:05-cv-03395-JFDocument 206Filed 01/23/2007Page 1 of 151 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28JOEL H. BERNSTEIN (admitted pro hac vice) CHRISTOPHER J. KELLER (admitted pro hac vice) LOUIS GOTTLIEB (admitted pr
USC - CS - 510
University of Southern CaliforniaCenter for Systems and Software EngineeringUniWord Case StudyCS 510 Fall 2007 Barry Boehm, USCUniversity of Southern CaliforniaCenter for Systems and Software EngineeringUniWord Case Study Background The Competition
RPI - BCBP - 4870
Protein Structure Determination, BCBP 4870, Fall 2007 Homework 2 due Nov 8, 2007 (A) Using a Bragg plane diagram, explain why a crystal with P2 symmetry (2-fold screw along the c1axis), has only even-numbered reflections in the c* direction. i.e. (001),
SUNY Buffalo - CSE - 563
Knowledge Representation and Reasoning Logics for Articial IntelligenceStuart C. ShapiroDepartment of Computer Science and Engineering and Center for Cognitive Science University at Bualo, The State University of New York Bualo, NY 14260-2000 shapiro@cs
SUNY Buffalo - CSE - 563
Knowledge Representation and Reasoning Logics for Articial IntelligenceStuart C. ShapiroDepartment of Computer Science and Engineering and Center for Cognitive Science University at Bualo, The State University of New York Bualo, NY 14260-2000 shapiro@cs
SUNY Buffalo - CSE - 563
Knowledge Representation and Reasoning Logics for Articial IntelligenceStuart C. ShapiroDepartment of Computer Science and Engineering and Center for Cognitive Science University at Bualo, The State University of New York Bualo, NY 14260-2000 shapiro@cs
Rose-Hulman - CS - 414
Maintainability RequirementsBasics: integrated problem adder integrated subject updater moderator controls restore pointsElaboration: Integrated problem adder:The problem adder is an integral to the maintainability of the system. With this tool, the sy
Rose-Hulman - CS - 414
Availability Requirements:Quick Rundown:Wants: -24/7 uptime -no corruption of data -code runs completely clean Needs: - work week (Sunday night Friday afternoon) long uptime - corruption handled - working backup systemElaboration:Uptime: Since this is
Rose-Hulman - CS - 414
CS 414 Software Engineering Team 3 Feb 10 Monday 2003 8:30 O259Leader: Stuart Ford Note Taker: Aydrian Howard Timekeeper: Fred PabonAGENDA Review Agenda Stuart Ford (1 min) o Make modifications if needed Current Items (5 min) o Presentation Available o
University of Toronto - ECE - 1770
THE DESIGN AND IMPLEMENTATION OF OPEN ORB V2 Gordon S. Blair, Geoff Coulson, Anders Andersen1, Lynne Blair, Michael Clarke, Fabio Costa, Hector Duran-Limon, Tom Fitzpatrick, Lee Johnston, Rui Moreira2, Nikos Parlavantzas and Katia Saikoski Distributed Mul
Dickinson State - EE - 437
ECE 437Homework - DC Motor DrivesYuvarajan1. The dc motor (Fig. 15.13(a)-both armature and field are supplied by full converters) has Ra =1.0 and Kv = 1.2 V/(rad/s). The dc motor operates with a constant field current If = 0.75A which is 60% of the max
Bowling Green - CS - 2310
Chapter 13: Data StructuresChapter 13Data StructuresJava ProgrammingFROM THE BEGI NNI NG1Copyright 2000 W. W. Norton &amp; Company.Chapter 13: Data Structures13.1 Multidimensional Arrays Multidimensional arrays have more than one dimension. Java allo
Cal Poly - CPE - 269
CPE 229 Course Notes: Lecture 8Copyright: 2005 Bryan MealyYet Another Real Story FSMs are primarily used to control other circuits. It is possible to make a FSM that will output a desired counting sequence (namely counters) but that is more an academic
Mich Tech - GENENG - 1101
Engineering Analysis and Problem SolvingWelcometo ENG11011So Why Choose Engineering?1. 2. 3. 4. 5. 6. 7. 8. 9. 10.Job Satisfaction Variety of Career Opportunities Challenging Work Intellectual Development Potential to Benefit Society Financial Secur
National Taiwan University - COB - 525
212 ReviewBasic Cost Behavior9/12/02Prof. Bentz1Basic Model of Total Cost In A&amp;MIS 212, we use the basic model of total cost, Independent TC = F + vQ VariableDependent Variable Parameters (coefficients)9/12/02Prof. Bentz2Model Characteristics
Washington - EE - 485
Autumn 2008EE485 Homework #2 Solutions 1. (30%) Electromagnetic wave and attenuation. Light with = 650 nm in free space is focused uniformly into a spot size of radius 1 mm on the surface of a semiconductor. Assume 5 mW of optical power enters the semico
Wisconsin - CS - 564
%!PS-Adobe-2.0 %Creator: dvips(k) 5.86 Copyright 1999 Radical Eye Software %Title: class.dvi %Pages: 18 %PageOrder: Ascend %BoundingBox: 0 0 612 792 %DocumentFonts: CMBX12 CMR12 CMSS12 CMSY10 CMBX9 CMR9 CMR10 CMBX10 %+ CMTI10 CMMI10 CMTT10 %DocumentPaperS
University of Toronto - CS - 324
University of Toronto CSC324Principles of Programming Languages, Summer 2001Course Information LecturerDiana Inkpen ofce: phone: e-mail: Wed 4:30-6, Thu 2-3:30 SF4301B 416-978-4299 dianaz@cs.toronto.edu SF2303DOfce HoursInformation SourcesThe web pag
National Taiwan University - AEDE - 205
AEDE 205 Spring 2007 Homework 3 Due Monday, April 23, 2007 (Note: there is no need for Excel for this weeks homework so we will not hold lab. However, the TA will have office hours during the times when he would normally hold lab. Office hours are held in
Canisius College - M - 122
M 122 Review for Test II Sections 2.1 - 2.5, 2.7 &amp; 4.1 - 4.3Name_Determine if the graph of the function is concave up or down and give the coordinates of the vertex. 1) y = (x - 4)2 + 3 1) 2) y = -(x + 5)2 - 5 Algebraically find the coordinates of the v
Binghamton - CS - 350
CS 350: Final Exam (Fall 2005)12/9/2005 Please read the following paragraph carefully. The exam is out of 200. You get 40 points as a holiday gift! Answer 160 points worth of questions. If you answer more than the required questions, I will throw away/sc
Fayetteville State University - PHY - 2054
Appendix A Hitachi V-222 OscillscopeFIRST TIME OPERATION Insert the plug of the power cord on the rear panel into the power supply wall socket and set the controls as follows.POWER INTEN FOCUS AC-GND-DC POSITION V. MODE TRIG SOURCE INT TRIG TIME/DIV POS
UC Riverside - STAT - 170
Homework 1 (Due: 10/11/2002)Problem 1: DS book, page 108-109. Problem Y: 1, 2, 3, 4, 5, 6. Solution: See the Appendix of the Book. Problem 2: DS book, page 96. Problem A: 1, 2, 3, 4, 5 Solution: See the Appendix of the Book. Problem 3: DS book, page 99.
Washington University in St. Louis - VO - 1055
CCSD3ZF0000100000001NJPL3IF0PDS200000001 = SFDU_LABELRECORD_TYPE = STREAMOBJECT = TEXT NOTE = &quot;Description of software provided with the Viking CD-ROM set&quot; PRODUCT_CREATION_TIME = 1990-12-21END_OBJECT = TEXTEND Decompression Software The SOFTWARE
Lake County - LIFE - 355
PCR-Based Detection of Genetically Modified Soybean and Maize in Raw and Highly Processed FoodstuffsC. Tengel, P. Schler1, E. Setzke1, J. Balles, and M. Sprenger-Hauels1 Labor L+S AG, Bad Bocklet, and 1QIAGEN GmbH, Hilden, GermanyBioTechniques 31:426-42
NYU - ATM - 262
two cycles of n(t) (t:0-&gt;2), seed 115, N=12550 40 30 20 10 0 Row 7 -10 -20 -30 -40 -50 0.04 0.12 0.2 0.28 0.36 0.44 0.52 0.6 0.68 0.76 0.84 0.92 1 1.08 1.16 1.24 1.32 1.4 1.48 1.56 1.64 1.72 1.8 1.88 1.96 0 0.08 0.16 0.24 0.32 0.4 0.48 0.56 0.64 0.72 0.8
UNC - ECON - 434
Econ 434: History of Economic DoctrinesQuestions from Previous Versions of Quiz 11. A view that all phenomena conform to inherently stable and universal principles is least consistent with the concepts that underpin: (a) scientific laws about the cosmos
LA Tech - BAK - 406
Maryland - M - 140
MATH 140: Calculus I Calculus is a central pillar of education in the quantitative sciences. It provides the language and conceptual framework to analyze change and accumulation. At the University of Maryland, Math 140141 is the basic sequence of calculus
Allan Hancock College - CS - 9242
54321DDUSBPower 6 5 2 1 C6 100nFCD3 3 4 R4Q1 3 HAT1043M 4ZHCS2000 1 2 5 6 1KCU1 J2 VBus DD+ ID(NC) Gnd Shield USB - Mini B 1 2 3 4 5 Shell R1 C1 1M 100nFBL14.7uH4 20 16 15 19 27 28 17 C5 100nFVCCIO VCC USBDM USBDP Reset OscI OscO 3V3Out
Allan Hancock College - CS - 9242
OKL4 Microkernel Reference ManualAPI Version 0316Open Kernel LabsDRAFTDocument Number: Software Version: Date:OK 10000:2006 (revision 10) 2.1 June 17, 2008Copyright 20062008 Open Kernel Labs, Inc. Copyright 2006 National ICT Australia Limited This p
Allan Hancock College - CS - 9242
Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane ProcessorDeveloper's ManualMarch 2005Document Number: 252480-005Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ContentsINFORMATION IN THIS
Allan Hancock College - CS - 9242
Iguana Reference ManualOpen Kernel LabsDRAFTDocument Number: Software Version: Date:OK 40008:2007 (revision 4) 2.1.1 May 9, 2008Copyright 20072008 Open Kernel Labs, Inc. This publication is distributed by Open Kernel Labs Pty Ltd, Australia. THIS DOC
Allan Hancock College - CS - 9242
Elfweaver Reference ManualOpen Kernel LabsDRAFTDocument Number: Software Version: Date:OK 40000:2007 (revision 7) 2.1.1 June 17, 2008Copyright 20072008 Open Kernel Labs, Inc. This publication is distributed by Open Kernel Labs Pty Ltd, Australia. THI
Allan Hancock College - CS - 9242
Integrated Device Technology, Inc.IDT79RV4700TM RISC Processor Hardware User's ManualVersion 2.1 December 19972975 Stender Way, Santa Clara, California 95054 Telephone: (800) 345-7015 TWX: 910-338-2070 FAX: (408) 492-8674 Printed in U.S.A. 1996 Integra
Allan Hancock College - CS - 9242
System Controller for RC4640, RM523X and VR4300 CPUs FEATURES Integrated PCI system controller for high-performance cost sensitive embedded applications Support the following 32-bit bus CPUs:- IDT RC4640 and RC4650 (in 32-bit mode) - QED RM523X - NEC/To
Duke - CPS - 296
H XR X |zsi R I I U ` u ` Y 8WBU b u ` U e@W D VVQXvfph V1CgXB bh Y W b i W Y Uh bh U @ ` B i W m ` @ W b ` b ` wB b W W wB pQfs&quot;%ppfCVXsQVvggu&quot;atcQgtgW p y&quot;V~&quot;vB q yw Wq k b 8 W R |XVQCTfX%VyE4pQVQv&quot;vgVzTsVXxVXsQVgTW p g UI b ` U 8 W @ W e ` U W mh F Yq
Michigan State University - ME - 410
ME 410Spring 2008Homework 10 Due: March 27, 20081. Air at 4E-4 kg/s and 27C enters a triangular duct that is 20 mm on a side and 2 m long. The duct surface is maintained at 120C. Determine the air outlet temperature.2. Determine the surface temperatur
Washington University in St. Louis - CS - 342
CS 342: OO Software Development LabTools and TechniquesUnix High-Level OverviewCS 342: Object-Oriented Software Development LabUser interaction with Unix Useful Unix Command Categories The Shell For further informationUnix High-Level OverviewDavid L
Oakland University - CSE - 411
CSE411 AutomataDecember 3, 2003Homework 10Due Date: December 10, 2003 1. Problem 6.3.3, page 292. 2. Problem 6.4.2, page 299. 3. Problem 7.1.1, page 308. Total points: 50 (20 points) (10 points) (20 points)1
Penn State - IST - 104
Spring 2007Angsana A. TechatassanasoontornIST 220 Networking and TelecommunicationsNetwork Lab Assignment 2 Constructing a Local Area NetworkDue date: Mar. 9, 2007Acknowledgements: This lab assignment was developed by Dr. Peng Liu and Hai WangProjec
IUPUI - CGT - 110
TECH 104 Technical Graphics CommunicationWeek 15:Design in Industry &amp; Applications of 3D CADVisualizationHelpsanyandeveryoneunderstandthe object/system/process. Etc.RapidPrototyping(RP) FusedDepositionModeling(FDM) LaminatedObjectManufacturing(LOM)
UCSB - LINKS - 297
ESM 297Renewable Energy Law and Policy Week 5: Vehicle fuel efficiency policyTam Hunt Energy Program Director/Attorney Community Environmental CouncilThe National CAF standards Created in 1975 by the Energy Policy and Conservation Act CAF standard cur
Cornell - P - 317
11Elementary particlesAll exercises below refer to the book by Serway, Moses, and Moyer. Exercise 11.1: Fundamental forces Exercise 15.02 Note: When asked to explain, please explain how it can be that the decay rates of the two processes mentioned in th
Georgia Tech - MATH - 3770
Math 3770 BProbability and StatisticsSpring 2006Instructor: Hua Xu; Skiles 127A; Email xu@math.gatech.edu; Web www.math.gatech.edu/~xu; Phone 404-894-2695; Office Hrs T,Th 10:30am~noon, or by appointment. Meeting Time: MW 3:05-4:25pm; Webber SST 2 Grad
Lake County - CI - 321
SOUTHERN ILLINOIS UNIVERSITY AT CARBONDALE DEPARTMENT OF MATHEMATICS COURSE INFORMATION, Fall 2004CI/Math 321, Section 001 Mathematics Content and Methods for the Elementary School III Cheng-Yao Lin Wham 326A 618-453-4236 cylin@siu.edu OFFICE HOURS: Mon:
Cal Poly Pomona - CS - 411
ScheduleCS 411 Winter 2007 Craig A. RichMondayWednesday3Friday Homework 1 assigned581012Jan15Martin Luther King Day Jan22Homework 1 due Phase 1 assigned Project groups due Homework 2 due Phase 1 due Phase 2 assigned17Homework 2 assigned19
Knox College - CS - 205
CS 205: Algorithm design and analysis Fall Term, 2008Homework 5Due: Monday 9/29 at 11:59pmComplete the following, which can be submitted via email or on paper: 1. A key to customer service is to avoid having the customer wait longer than necessary. Tha
Cox School of Business - P - 1307
Physics 1407 Test #3 (Practice) Fall 2004 NAME: SSN: This test consist of twenty multiple choice questions. Each question is worth five points. Please staple all your worksheets together with the test and turn-in together with your answer sheet. DATE:1.