UNIVERSITY THE OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
HISTORY OF EE 2310 Initially planned by Prof. David Harper as a counterpart to courses on computer organization and design at Berkeley and Stanford D. Patterson (Berkeley) and J. Hennessy (Stanford) are the academic originators of RISC architecture Required course, prerequisite to EE 4320 Taught in 199495 as EE 2399 by lecturers Implementation did not meet the expectations of EE faculty Taught 1996present by Prof. Cantrell, D. Hollenbeck and Dr. Dodge Background material added to make Patterson-Hennessy textbook accessible to students with zero hardware or software experience: Digital kindergarten (gates, few-gate circuits, Boolean, Karnaugh) Basic CS (overview of processes, data structures) MANY comments on evaluation forms call for a laboratory EE 2V99 taught in Spring 1999
c C. D. Cantrell (08/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
EE2310 OVERVIEW Course organization Professor Cantrell (email: [e-mail]) Voice phone: [phone] Oce: EC 2.302 Oce hours: Saturdays 10 AM noon Dr. Dodge (email: [e-mail]) Voice phone: [phone] Oce: EC 2.926 Oce hours: 45 PM Tuesdays and Thursdays TA: Arturo Garcia (email: [e-mail]) Oce: EC 2.908 Oce hours: Mondays and Wednesdays 3:00 4:15 PM Provisional grading algorithm (subject to change): course % grade = 0.10(homework %) + 0.225(midterm 1 %) + 0.225(midterm 2 %) + 0.45(nal exam %)
c C. D. Cantrell (08/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
GOALS FOR WEEK 1 Get access to the World Wide Web Ways to get on the Web: PC or Mac via modem, cable modem or DSL PC or Mac in UTD Microcomputer Lab Internet-connected Unix machine from work or UTD EE 2310 Home Page: http://www.utdallas.edu/~cantrell/ee2310/ Acquire books: Hennessy and Patterson, Computer Organization and Design, Second Edition, Morgan Kaufmann Publishers John Waldron, Introduction to RISC Assembly Language Programming, Addison-Wesley Capilano Computing Systems, LogicWorks 4, Addison-Wesley Roger Tokheim, Digital Principles, Third Edition, McGraw-Hill
c C. D. Cantrell (08/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
WHAT DO EEs DO? DESIGN Systems Computers, wireless phones, beroptic networks, . . . Circuits Logic circuits, transmission lines, ampliers, . . . Devices Transistors, antennas, . . . Software Signal processing, navigation, simulation, . . . ANALYZE (one must understand in order to design) Systems Performance, signal-to-noise ratio, . . . Devices Semiconductors, antennas, waveguides, . . . TEACH Courses Individual instruction M.S., Ph.D. dissertation research
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
COURSE GOALS EE 2310 Acquire the ability to use a hierarchical approach to understand a complex system Basic Electrical Engineering approach Valid for hardware and software Facilitates troubleshooting Essential on the job Become suciently well acquainted with the principles of computer architecture to be able to make intelligent use of computers for designing and simulating engineering systems, components, and devices Acquire a basic knowledge of assembler language Helps one to accomplish the rst two goals Useful if one works with embedded systems
c C. D. Cantrell (01/1999)
VIEWS OF A 74135 DEVICE AT THREE DIFFERENT HIERARCHICAL LAYERS
IC LEVEL
135
PIN1 PIN2 PIN3 PIN4 PIN5 PIN6 PIN7
GATE LEVEL
PIN1 PIN1 PIN2 PIN2 PIN3 PIN5 PIN7 PIN3 PIN4 PIN4 PIN5 PIN6 PIN7 PIN6
1 1A 3 2 1Y 1B 4 1C,2C 5 2A 7 6 2Y 2B
GATE LEVEL
b a c
TRANSISTOR LEVEL
b b a a
b b
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
FALLACIES I dont need to understand computers in order to use them. Nothing works all the time. When it breaks, its up to you: to diagnose the problem (probably) to x it Im a CS major. I dont need to know about circuits. Im majoring in EE. I dont need to know about data structures. The boundary between hardware and software is fuzzy Field-programmable gate arrays (FPGAs): Software-programmable computer architecture! Computational modeling: Choice of algorithm and program design depend on computer architecture Cache size/design aects loop order Parallelizability of algorithms/programs aects choice & design of hardware
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
WHAT IS COMPUTER ARCHITECTURE?
Applications Compiler O/S Kernel
Instruction Set Architecture Functional Units Memory I/O System
Logic Gates (Digital Design) Devices (Circuit Design)
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF AT TEXAS DALLAS
Erik Jonsson School of Engineering and Computer Science
SHRINK-WRAPPED SOFTWARE Shrink-wrapped software is a compiled program (or suite of programs) packaged in a box that is sealed inside a plastic envelope that shrinks to t the box when it is heated Three things make shrink-wrapped software usable on computers that are manufactured by dierent vendors: Dierent vendors compile their software for the same instruction set architecture Dierent vendors compile their software for the same operating system Input/output hardware that conforms to a common set of standards is available on dierent systems
c C. D. Cantrell (08/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
THE MAIN COMPONENTS OF A COMPUTER
Computer Processor Control Datapath Memory Peripheral Devices Input Output
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
HIERARCHICAL APPROACH TO WRITING SOFTWARE Large program (100s or 1000s of lines) Use top-down approach: Divide problem into tasks Dene a function (procedure, subroutine) to accomplish each task Code each function in its own module Specify interfaces (parameters to be passed, etc.) for each function module Essential concept for systems integration: The implementation of a function is independent of its interface specication Implementation belongs to a dierent level in the hierarchy Each module is a black box to higher-level modules Design is the most important step in creating a large program Most hard-to-nd bugs originate in a faulty design
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
SIMULATORS
1 SPIM ( 25 th the performance at none of the cost)
Simulates the RISC architecture (MIPS) most used in embedded systems (Nintendo 64, Sony PlayStation, . . . ) Available for architectures other than the native one The MIPS instruction set is simpler than most The SPIM interface is better than many real debuggers Registers, data segment, text segment, stack Documentation: Patterson & Hennessy, Appendix A; Waldron XMPSIM Simulates one Cray X-MP processor Runs under DOS Gives good view of pipeline timing, stalls, etc.
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
EE 2310 OUTLINE Whats inside the case? History know it or repeat it Performance analysis Data representations Combinational logic circuits and Karnaugh maps MIPS assembly language Sequential logic circuits Design of a simple arithmetic and logical unit (ALU) Design of the ALU control Designing a processor for speed: Pipelining Design of high-performance memory systems Input and output systems
c C. D. Cantrell (01/1999)
THE UNIVERSITY OF TEXAS AT DALLAS
Erik Jonsson School of Engineering and Computer Science
HOW ...