Stallings William Computer Organization and Architecture
Chapter 10 Instruction Sets: Characteristics and Functions
What is an instruction set?
Thecompletecollectionofinstructionsthatare understoodbyaCPU MachineCode,i.e.binary Usuallyrepresentedbyassemblycodes H * n ?
W ,16 101 102 103 104 201 202 203 204
Machine Code
(4 OP 0010 0001 0001 0011 0000 0000 0000 0000
,12
)
Assembly code
Operand 0010 0000 0001 0010 0000 0010 0010 0000 0011 0010 0000 0100 0000 0000 0000 0000 0000 0000 0000 0000 0010 0011 0100 0000 two three four sum
LDA ADD ADD STA DAT DAT DAT DAT
two three four sum 2 3 4 0
Elements of an Instruction
Operationcode(Opcode) SourceOperandreference ResultOperandreference NextInstructionReference
Puttheanswerhere Tothis Dothis
Move$R1,#2 MPY$R1,pi JumpL LHalt pi.DAT3.14
Whenyouhavedonethat,dothis...
Where have all the Operands gone?
I/Odevice( * Mainmemory( virtualmemoryorcache, CPUregister( * , * . * ) )
)
Components
CPU memory
registers data
ALU
data cache
program
data
Control unit
Bus
data
data
I/O
I/O
Instruction Representation
Inmachinecodeeachinstruction( e ) hasauniquebitpattern Forhumanconsumption(well,programmers anyway)asymbolicrepresentationisused Operandscanalsoberepresentedinthisway
ADDA,B e.g.ADD,SUB,LOAD
Simple Instruction Format
Instruction Types ( O *
: , Dataprocessing , ,
?)
,I/O
Datastorage(mainmemory O * I/O
LOAD,STOR,MOVE,... INPUT,OUTPUT,...
ADD,SUB,MPY,DIV;AND,OR,NOT;SHL, SHR,...
)
Programflowcontrol
JUMP;CMP,JLE,..;CALL,RETURN;...
Number of Addresses (a)
e T , e 3addresses
; e
Operand1,Operand2,Result a=b+c; Notcommon Needsverylongwordstoholdeverything
ADDb,c,a
add$R3,$R1,$R2
;ba+c ;$R3$R1+$R2
Number of Addresses (b)
2addresses
Oneaddressdoublesasoperandandresult a=a+b Reduceslengthofinstruction Requiressomeextrawork
Temporarystoragetoholdsomeresults
ADDa,b
aa+b
$R,*N d
Number of Addresses (c)
1address
Implicitsecondaddress Usuallyaregister(accumulator) Commononearlymachines
ADDa
2 *C X
ACAC+a
Number of Addresses (d)
0(zero)addresses e.g.pusha
a n a (n Usesastack pushb ) b a +
P375
a+b c
add popc
c=a+b
P335
How Many Addresses
Moreaddresses
Morecomplex(powerful?)instructions Moreregisters Fewerinstructionsperprogram
Interregisteroperationsarequicker
Feweraddresses
Lesscomplex(powerful?)instructions Moreinstructionsperprogram Fasterfetch/executionofinstructions
Design Decisions (1)
Operationrepertoire RISCvCISC 100
Howmanyops? Whatcantheydo? Howcomplexarethey? 2 10 Callsubroutine ~200 ?
Datatypes( ?) Instructionformats
Lengthofopcodefield Numberofaddresses
Design Decisions (2)
Registers
NumberofCPUregistersavailable Whichoperationscanbeperformedonwhich registers? direct,immediate,base,indirect,
0
Addressingmodes(later)
31
2000 add $R2, 2F00 56
2F00
8
5
19
base address $R1
?
300000 add $R2,300F00 300F00 78
300000
32 o registers
add $R2,$R1(F00)
Logicaladdress
0000 0001 0002 0003 0004 LDA $R1(10) MPY $R1(11) MPY $R1(12) STA $R1(13) GO $R1(0)
0010 0011 0012 0013
...
segment
logical address = $R1+offset = $R1(offset)
... ...
2 3.14 6.5
Types of Operand
Addresses Numbers
P: 1000
Characters
Integer/floatingpoint ASCIIetc.
LogicalData
Bitsorflags (Aside:Isthereanydifferencebetweennumbersand characters?AskaCprogrammer!)
`T XW
P DNS o
Type A MX A A
Memory
Name IP address www.nju.edu.cn 202.119.32.6 netra.nju.edu.cn 202.119.32.8 cs.nju.edu.cn 202.119.36.38 software.nju.edu.cn219.19.38.2
w
w
w u u \0 . . 6
. . . 2 1 3 \0
01100011
n e c 0 1 2 A
j
d n 2 9 . \0
S oX ` i
2 o bytes 1
Pentium Data Types (
)
0 8bitByte 4 16bitword o 32bitdoubleword 64bitquadword Addressingisby8bitunit A32bitdoublewordisreadataddresses divisibleby4
Specific Data Types
Generalarbitrarybinarycontents Integersinglebinaryvalue(1,2,4,8bytes) Ordinalunsignedinteger(1,2,4,8bytes) FloatingPoint UnpackedBCDOnedigitperbyte PackedBCD2BCDdigitsperbyte Bitfield BinaryCodeDecimal ByteString
BCD (Binary-Code Decimal)
p UnpackedBCD 1h ( * 1h ( PackedBCD 1h ( *2h (
,2008 ,2008
P338 .
00000010 0000000 0 00000000 00001000
.
BCD : 4 ,usuallyinmultiplesof8 bits. ,246
00100000
0000100 0
G
W 10.13
W ,1698+1786=3484 0001011010011000 + 0001011110000110 : 0010111000011110>9 n >9, 6 + 0110 n * , 6 0010111000100100 + 0110 10 1, 0010111010000100 16 1, 6. + 0110 0011010010000100
Pentium Data Types
P340
PowerPC Data Types
8(byte),16(halfword),32(word)and64(doubleword) lengthdatatypes Someinstructionsneedoperandalignedon32bit boundary Canbebigorlittleendian Fixedpointprocessorrecognises:
Floatingpoint
Unsignedbyte,unsignedhalfword,signedhalfword,unsigned word,signedword,unsigneddoubleword,bytestring(<128 bytes) IEEE754 Singleordoubleprecision
Types of Operation
DataTransfer Arithmetic Logical TransferofControl I/O Conversion SystemControl
ppt Transfer
9
P341
Data Specify
Source Destination Amountofdata
P344 Load$R2,Pi;$R2Pi Store$R2,x;x$R2
Maybedifferentinstructionsfordifferent movements
e.g.IBM370
L $R1,two ;32 ;16 LH$R1,two ;16AX 2 ;8
PC
MOVAX,053H
AL 16 W Accumulator MOVAH,
AH
Arithmetic
Add,Subtract,Multiply,Divide Mayinclude
SignedInteger Floatingpoint
Increment(a++) Decrement(a) Negate(a)
inc a dec a
Shift and Rotate Operations
0
P346
On a left arithmetic shift, a logical left shift is performed on all bits but the sign bit, which is retained.
W
W 1000,1100,0101,0111 1100,0110,0010,1011 1000,1100,0101,0111 1001,1000,1010,1110 0011,1100,0101,0111 0001,1110,0010,1011 0111,1100,0101,0111 0111,1000,1010,1110
Logical
Bitwiseoperations AND,OR,NOT,XOR
R1=202.119.36.101 R2= 255.255.255.0 202.119.36.0
IP o
10100101 XOR 11111111 01011010
Transfer of Control (if, for, W
Branch
BRLbranchtoL BRZLbranchtoLifresultiszero
)
P344
Example:ifA=BthenprintAandBelseprintB
load$R1,A sub$R1,B BRZL PRNA L:PRNB ;$R1A ;$R1BA ;ifAB=0, L ; A
Branch Instruction
Pentium EFLAGS W
Sign flag Zero flag
OD I TS Z A P C
P443,Fig12.20
16 o Overflow flag
16 o Interrupt enable flag Auxiliary carry flag
Carry flag
n `
P359
E,Z Z=1 NE,NZ Z=0 G,NLE[z=0]and[.]
; 0 ; 0 >;notlessthanorequal()
80x86 W
W :IFa>bthen :
;
P369, 10.15 c.
subCX,CX movAX,b cmpAX,a JGE L1 incCX L1opxx,yyy
CX0 ; AXb ;b~a ;ifb>=a L1 ;CXCX+1, a>b,CX=1 ;a<=b,CX=0
Transfer of Control
Skip Example,S=(1+2+3++10)
ISZ$R1increment$R1andskipif$R1iszero
P350
Subroutinecall
call return
load $R1, ten ; $R1-10 clear $R2 ; $R20 L1: add $R2, $R1 ISZ $R1 ; $R1+1 BR L1 L2: store $R2, S stop ten DAT -10
Call a function
P1(a) L: Compiler
generates
Program
voidP1(u);
{... }
Compiler generates
pusha callP1 L:
{popu ... return }
Use of Stack
Conversion
BinarytoDecimal EBCDICtoASCII
P342, P199
ExtendedBinaryCodedDecimalInterchangeCode AmericanStandardCodeforInformationInterchange
Conversion
EBCDICtoASCII(IRA)
ASCII
00 30 31 39 7F NUL 0 1 9
Character
F2F0F0F632303036 EBCDIC
F0 F1 F9
DEL
Conversion
EBCDICtoASCII
R1 1000 1000 R2 2100 2100 2103 F2 F0 F0 F6 32 30 30 36
TR R1, R2, 4
10F0 10F1 10F9 10FF 30 31 39
Input/Output
P207
Maybespecificinstructions(isolatedI/O) Maybedoneusingdatamovementinstructions (memorymapped) Maybedonebyaseparatecontroller(DMA):
Ch7-21
Systems Control
Privilegedinstructions CPUneedstobeinspecificstate Foroperatingsystemsuse read a control register (P445) access PCB (P253)
Ring0on80386+ Kernelmode
Foreground Reading
PentiumandPowerPCoperationtypes Stallingsp338et.Seq.
Byte Order (A portion of chips?)
Whatorderdowereadnumbersthatoccupy morethanonebyte e.g.(numbersinhextomakeiteasytoread) 12345678canbestoredin4x8bitlocationsas follows
184 12 34 big 56 187 78 184 78 56 34 187 12
little
Byte Order (example)
Address 184 185 186 187 Value(1) 12 34 56 78 Value(2) 78 56 34 12
P377
i.e.readtopdownorbottomup?
Byte Order Names
TheproblemiscalledEndian Themappingontheleftstoresthemost significantbyteinthelowestaddress Thisiscalledbigendian Themappingontherightstorestheleast significantbyteinthelowestaddress Thisiscalledlittleendian
P377
Example of C Data Structure
Alternative View of Memory Map
P379
StandardWhat Standard?
Pentium(80x86),VAXarelittleendian IBM370,Motorola680x0(Mac),andmostRISC arebigendian Internetisbigendian
MakeswritingInternetprogramsonPCmore awkward! WinSockprovideshtoianditoh(HosttoInternet& InternettoHost)functionstoconvert
Summary
1.Elementsofaninstruction
OPOperand1,Operand2, 1,2,3,0addressesinstruction
2.Typesofoperand
number: character: address: logicaldata:
char
integer,ordinal,floatpointB pointer bitfield,bytestring
3.TypesofOperation
DataTransfer Arithmetic Logical TransferofControl I/O Conversion SystemControl
4.Processingunits
8bitByte 16bit 32bit 64bit ...
5.Usingassemblylanguagetowritea program
Assignment
1. 10.3 2. 10.14 3. 10.15(d)
P360
80x86
1.8086
AX BX CX DX BP SP SI DI
P431
Registers:8generalpurpose,4segment,2 control, 16bits
AH BH CH DH AL BL CL DL
Accumulator Base(BaseRegister) Count Data BasePoint(16 ), S <S StackPoint SourceIndex DestinationIndex
,
DS
In 80x86
MOV SI, 1 MOV CX, 10 L1: MOV AX, A[SI] ADD AX, B[SI] MOV C[SI], AX INC SI LOOP L1 STOP Array A DB Array B DB Array C DB S * < X
; SI1 ; CX10 ; AXA[i] ; AXA[i]+B[i] ;C[i]A[i]+B[i] ; SISI+1 ; CXCX1,if(CX=0) ;o ,o L1
, P loop. P
Segmentregisters:
CS DS SS ES
CodeSegment DataSegment StackSegment ExtraSegment
Controlregisters:
IP Flag
OD I TS Z A P C
InstructionPointer(PC) Flag (P358,443)
CS
0
DS
0
o
SS
SP
0
o
H
:[BX]=(DS)*10H+(BX) [BP]=(SS)*10H+(BP)
32 2.80x86
8
6
EAXEBXECXEDX EBPESPESIEDI DSCSSSESFSGS
EIP EFLAGS 16 <n
32 <n *
16
32 32 <n * 32 n <*
32
AH BH CH DH
AL BL CL DL
EAX EBX ECX EDX EBP ESP ESI EDI EIP
OD I TS Z A P C EFLAGS