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lesson18

Course: MAE 140, Spring 2010
School: UCSD
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18 Lesson Op-Amps #3 (Section 4-4) (CLO 4-2) The third lesson on Op-Amps focuses on cascading Op-Amp building blocks and the concept of loading. Last lesson we developed several Op-Amp building blocks. Those along with the voltage divider are very useful in designing useful active circuits. We need to define what a cascade connection is: It is a series connection of building blocks that act independently even...

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18 Lesson Op-Amps #3 (Section 4-4) (CLO 4-2) The third lesson on Op-Amps focuses on cascading Op-Amp building blocks and the concept of loading. Last lesson we developed several Op-Amp building blocks. Those along with the voltage divider are very useful in designing useful active circuits. We need to define what a cascade connection is: It is a series connection of building blocks that act independently even when connected together. Said another way they are building blocks that do not load each other. Op-Amp building blocks are great insofar as they meet this definition. Let us look at a simple example. The two-Op-Amp circuit consists of an inverter and a weighted inverting summer. Each function is treated separately with the input to the summer being the output of the inverter. The block diagram should make this concept clearer. A second example of two different modules say a noninverter feeding a subtractor would be useful. The analysis of simple cascaded modules tends to be easily understood and rarely causes and trouble for students. 1 k + VS1 10 k 2.2 k 1 k + VS2 2.2 k _ + VCC=+/-15V _ + + vOUT VS1 -10 -10VS1 -2.2 +22VS1 + +22VS1-VS2 -1 VS2 vOUT -1VS2 + At this point one needs to bring up the issue of loading. The following example is a good one to use. Both circuits are composed of two R1 RS RF modules or stages a voltage divider _ + and an inverting Op-Amp. In the top vS + case, the voltage divider comes first + v = - R V = - R (R +R ) R2 and is connected to the inverter. In OUT FS F 1 2 RT R1RS+R2RS+R1R2 the second case, they are reversed. Intuitively one would expect that the RT=RS+(R1||R2) circuits simply cascade and multiply together. However, that is not the RS case of the top connection. Instead R + _F of RS the actual input resistance is R1 vS the parallel combination of R1 and R2 + vOUT= - RFvS x R2 + in series with RS the Thvenin RS (R1+R2) R2 resistance that the input to the OpAmp sees. The reason is that the input resistance of an inverter is equal to RS and can be of the same order as the resistors in the voltage divider. If we make all the resistors equal we would expect the voltage divider to produce an output of 1/2 vS and the inverter 1. So if cascading works we would get vO= 1/2 vS. Instead, we get 1/3 vS. The bottom configuration does not have that problem since there is no loading with RS and the output of an Op-Amp with a very small Rout does not generally cause loading. We could use the top configuration if we were to make the RS at least 100 times larger than R1 and R2. In that case, the effect of loading would be minimized (but not entirely eliminated). A non-inverter does not share the loading problem because its RIN is very high infinite in the ideal. Therefore, the cascade connection of a voltage divider and a non-inverter works regardless if the divider voltage comes first or last. Non-inverters are used when the input source (a transducer, for example) has a high or variable input resistance. Inserting a Follower between two stages that are loading each other would eliminate the problem, but would add the cost and complexity of another Op-Amp. The next topic is circuit realization from a block diagram. Consider the following block diagram. The students should be able to design a circuit solution that will realize the diagram. We want to create a circuit that will take an input source vS, multiply it by K and then add Vdc to it. Let us assume that K is positive. Since the only summer we know is + K inverting, we cannot simple use it. We could use a vS weighted summer and then invert the output by cascading an inverter with gain of 1. However, v OUT that might not be very efficient, nevertheless that is + v OUT =Kv S + V dc V dc a good place to start. Here are several solutions Solution (a) is the most obvious one. It assumes that both sources cannot be inverted. Solution (b) is similar but in those cases where K is negative, the first stage is not necessary (the gain can be shifted to the summer) or a Follower or non-inverter can be used to obtain the high input resistance that it offers. In those cases where both the R R source and the dc offset can be inverted KR + _ one can go directly into the summer (c). R vS KR _ Finally, if the offset can be scaled one can + + use a difference amplifier (d). The main Vdc + + (a) point to make is that there are numerous vOUT ways to achieve the same result but one R R way may be better than the others because KR + _ of efficiencies, loading, costs, power R vS _ requirements, size, component values, etc. + R _ Vdc + The next topic to discuss is to point out that using real Op-Amps versus ideal ones is that (b) there are some limitations that need to be understood. First is that they do not provide R R KR KR _ _ infinite gain. Rather they are limited by + _ vS` -Vdc/K their open-loop gain A. In designing for a + KR R + + + + very high gain gains A/100 or greater it _ vOUT vOUT + is often necessary to split the gain over two Vdc vS` KR (d) (c) or more Op-Amps. If we needed a gain of + 107 and we were using Op-Amps with an A of 106, it would be reasonable to use two 4 stages one with a gain of 10 and the second with a gain of 103. Circuits (a) or (b) above lend themselves to two stages of amplification. Since some transducers require high amplification this is important. Point out that gains multiply not add. The second point is to always check to be sure that no Op-Amp becomes saturated. When cascading Op-Amps it might be possible to saturate a stage even if the output equation would make it appear that it could not happen. The output of any individual stage is always limited by VCC. + + vOUT
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