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Course: EE 4580, Fall 2010School: LSU
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LSU - EE - 4580
Jason McAllisterNovember 29, 2004UNCOMPENSATED SYSTEMStep Response1.41.2System: Closed Loop: r to yI/O: r to ySettling Time (sec): 9.961System: Closed Loop: r to yI/O: r to yPeak amplitude: 1Overshoot (%): 0.314At time (sec): 10.9Amplitude
LSU - EE - 4580
The take home part of the second midterm is:Deasign dynamic compensator for (s + 5)G(s) = - s(s^2 + s + 10)such that the closed loop system has overshot no more than 15%, settling time no more than5s, and ess \leq 0.1 for the unit ramp inpiut.The
LSU - EE - 4580
Analysis of the Continuous Linear SystemThrough the design in project 1, the plant with the servo system was calculated as12.88. Figure 1 shows the frequency response of this system.s + 6.5s 3 + 20.7 s 24Figure 1Due to the required response time of
LSU - EE - 4580
A1Appendix ADesign of Continuous-Time SystemTransfer Function and Kp/Kv Derivation:KpAmAmKpAmKpTm= Tm * s + AmKv + 1 ==2AmKpAmKv + 1 AmKpdTm * s + ( AmKv + 1) * s + AmKp1+s 2 + s()+Tm * s + AmKv + 1TmTmn =2AmKpTmAND 2 n = 4.8 ~ 8
LSU - EE - 4580
Page: 1Project 1EE 4002Alicia CorbettMichael DantinScott HammattPatrick QuebedeauxIntroductionThe first logical step in designing a feedback controller for the ball and beamsystem is to analyze the DC motor, the part of the system that causes the
LSU - EE - 4580
Page: 1Project 1EE 4002Alicia CorbettMichael DantinScott HammattPatrick QuebedeauxIntroductionThe first logical step in designing a feedback controller for the ball and beamsystem is to analyze the DC motor, the part of the system that causes the
LSU - EE - 4580
J ohnnyLaraEE4002DesignProject2:DigitalControlofthe BallBeamSystemM ay3,2004IntroductionThe purpose of this project is to gain experience and knowledge of theperformance of an uncompensated system and how it reflects our design if the system isun
LSU - EE - 4580
Page: 1Karrie HugghinsPatrick QuebedeauxMatthew BullEE 4580Report 1 of Design Project 1September 12, 2003Executive SummaryThe first logical step in designing a feedback controller for the ball and beam systemis to analyze the DC motor, the part o
LSU - EE - 4580
Page: 1Project 1EE 4002Alicia CorbettMichael DantinScott HammattPatrick QuebedeauxIntroductionThe first logical step in designing a feedback controller for the ball and beamsystem is to analyze the DC motor, the part of the system that causes the
LSU - EE - 4580
J ohnnyLaraEE4002DesignProject2:DigitalControlofthe BallBeamSystemM ay3,2004IntroductionThe purpose of this project is to gain experience and knowledge of theperformance of an uncompensated system and how it reflects our design if the system isun
LSU - EE - 4580
Page: 1EE-4580 CONTROL DESIGNPROJECT 2- BALL AND BEAM SYSTEMJASON MCALLISTER438-49-472611-17-04Page: 2Project SummaryOur goal is to design two compensators: one for the actuator which is a D.C. Motor(inner-loop), and the other is for the ball and
LSU - EE - 4580
LSU - EE - 4580
LSU - EE - 4580
Design Project 1 for EE4580As in the distributed notes, the linearized model for inverted pendulum consists of twotransfer functions. We aim to design Gyu (s) and Gu (s) such that the dominant dynamics forthe closed-loop system have damping ratio 0.83,
LSU - EE - 4580
EE-4580 CONTROL DESIGNPROJECT 1- INVERTED PENDULUMJASON MCALLISTER438-49-472610-18-04Introduction:In this project we have analyzed an inverted pendulum. This is a system which has bothan angle and distance considerations. The control of such a syst
LSU - EE - 4580
Design Project 1 of EE4580: Root Locus DesignThe plant model is a linearized pitch axis missile that has a transfer function = 2 + 8 7+ 25 = 2The design speci cations are given as follows::GsTransient response:P:O:Steady-state response:s 12,ess
LSU - EE - 4002
,. meclrJo.V1iCQ\<';~E>ievYJbQ) lineaof' motioY)fo.~~f~ ~Hr~l~)Mmotion.!9UJc~'0.fdrtdV"'.tM'Mot). o.Md~clt.tfr 0. Dot.(=?u= ~"-~o.s'M+DFI.tdc.TIon It>)"rfI~'16 b ;nertiai V\plAt pv-Je,('Sef'fdc~d" LAt M~(-I-t)~1\V) " tdr \J.b) n
LSU - EE - 4002
load current Ia; Ia=Ia';t=Ia(:,1);Ia=Ia(:,2);plot(t,Ia,'k'),xlabel('time [s]'),ylabel('current Ia [A]'),gridload velocity; v=v';t=v(:,1);v=v(:,2);plot(t,v,'k'),xlabel('time [s]'),ylabel('velocity v [m/s]'),gridload torque T; T=T';t=T(:,1);T=T(:,2);
LSU - EE - 4002
EE 4002: Project #1Elevator DC MotorByCarranza J. Guidry III10/18/041.)Calculate the power of the motor and select (using Web Site of producer orvendor on internet, e.g. e-motorsonline.com) the appropriate separately excited DCmotor for driving th
LSU - EE - 4002
load speed speed;speed=speed';t=speed(:,1);speed=speed(:,2);plot(t,speed,'k'),xlabel('time [s]'),ylabel('car speed [km/h]'),grid
LSU - EE - 4002
I.CalculationsMotor Parameters:Ra = .066 Kt = 1.33 Nm/ALa = 6.5 mHKe = 1.33 V/(rad/s)Jm = 25 kg*mCar Parameters:M = 997 kgFad = .046Cw * A * uU = 50 km/hCw = 0.5Diameter of wheel = .6m1.) PWM converter parameter:a. Fs,I = 1kHzb. Kpwm = 12
LSU - EE - 4002
I.CalculationsMotor Parameters:Ra = .066 Kt = 1.33 Nm/ALa = 6.5 mHKe = 1.33 V/(rad/s)Jm = 25 kg*mCar Parameters:M = 997 kgFad = .046Cw * A * uU = 50 km/hCw = 0.5Diameter of wheel = .6m1.) PWM converter parameter:a. Fs,I = 1kHzb. Kpwm = 12
LSU - EE - 4002
r...-~.".,EE 400204.04.2003/ 0 Name: .JA1E~cfl;1/. tJYi?Y~".Q(f.MID SEMESTER TESTNO.2Answer 3 questions and solve one out of two numerical problemsQuestion 1 (2 pofuts):('j)a) Draw the simplified control circuit diagr~thtwo blocks: contr
LSU - EE - 4002
,-.,~",-sJ.~76.9EE 400204.12.2002Name: .MID SEMESTER TESTNO.2Answer 3 of 4 questions and solve the numerical problemQuestion 1 (2 points): For a switch-mode two-quadrant converter:a) Draw the circuit diagram of two-quadrant converter (with tr
LSU - EE - 2731
Classification of DigitalCircuits Combinational logic circuits. Output depends only on presentinput. Sequential circuits. Output depends on present inputand present state of the circuit.Combinational LogicDesign Procedure Start with the problem
LSU - EE - 2731
LSU - EE - 2731
Heath J LeBlancMariel Losso9/20/05EE 2731 Section 3, Group 5Experiment 1 - Combinational Logic CircuitsDual 2-Bit Comparator CircuitPart A: Design and build a combinational logic circuit with 4 inputs and 3 outputs thatcompares two 2-bit numbers, l
LSU - EE - 2731
Heath J LeBlancMariel Losso9/27/05EE 2731 Section 3, Group 5Experiment 2 Decoders, Multiplexers, and DemultiplexersTwo-to-Four Binary Decoder with EnablePart A:a) Design and build a 2 to 4 binary decoder with an enable. The truth table for this dev
LSU - EE - 2731
Heath J LeBlancMariel Losso10/11/05EE 2731 Section 3, Group 5Experiment 3 - Boolean Function Realization using Decoders and MultiplexersThree input Majority Logic CircuitPart 1:2b) Design and build a 3-input majority logic circuit using one 8 to1 m
LSU - EE - 2731
LSU - EE - 2731
19B2Logic Preferences40110000001057E:\EEBIBLE\EEF16D~1.BIB\EE18C7~1.273\DIGITA~1\GENERIC.LIB52E:\EEBIBLE\EEF16D~1.BIB\EE18C7~1.273\DIGITA~1\LS.LIB58E:\EEBIBLE\EEF16D~1.BIB\EE18C7~1.273\DIGITA~1\STANDARD.LIB
LSU - EE - 2731
ICFunctionTTL7400740274047406740774087409741074117413742074217427743074327440744174427447744874517454747074727473747474757476748374857486749074917492749374957497741237412574138741397415174153741547415574157
LSU - EE - 2731
EE 2731Digital Logic Design LabSpring 2004Instructor:Gabriel A. de SouzaRoom 313 EE Building, Ph: 578-4831, email: gdesou1@lsu.eduOffice hours: 12:30 2:30 Mondays & Wednesdays9:00 10:30 Tuesdays & Thursdays8:30 10:30 FridaysTA:Office hoursLab S
LSU - EE - 2731
LSU - EE - 2731
LSU - EE - 2731
LSU - EE - 2731
LSU - EE - 2731
LSU - EE - 2731
Administrative Policy of the Laboratory1) You are not allowed to smoke, eat or drink in the Laboratory. You are expected toconduct yourself professionally, and to keep your bench area clean and neat. Youare required to return all equipment and parts us
LSU - EE - 2731
Digital Logic Design LaboratoryEE2731Gabriel Augusto Marques Tarquinio de SouzaDepartment of Electrical and Computer EngineeringLouisiana State UniversityandAgricultural and Mechanical CollegeRev. 10/03Baton Rouge, LA 70803iiTable of ContentsAd
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 1 - Combinational Logic CircuitsPart A:Design and build a 4-input majority circuit using AND, OR, and NOT gates.Digital Inputs:Data Inputs:Select Lines:Clock:Digital Outputs:ZTruth Table:ABCD0000000
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 2 Decoders, Multiplexers, and DemultiplexersPart A:Digital Inputs:A) Data Inputs: D0, D1, D2, D3B) Select Lines: EN, A, BC) Clock: n/aDigital Output: YEN01111BX0011AX0101Y0I0I1I2I3
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 3 - Boolean Function Realization Using Decoders and MulitiplexersPart A:Implement a full adder with AND, OR, and NOT gates.Digital Inputs:Data Inputs:Select Lines:Clock:A, B, & Cin from switchesNoneNon
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 4 Flip-FlopsPart A:Construct A SR latch with two NAND gates.Digital Inputs:A. Data Inputs S & R from S1 and S2B. Select Lines NoneC. Clock NoneDigital Outputs:Q & QNTruth Table:S0011R0101QL
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 5 - CountersPart A: Design and build a synchronous decade counter using two 74LS76 and one 74LS08 ICs.Digital Inputs:Data Inputs:Select Lines:ClockNoneNone(debounce switch or digital clock)Digital Outp
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 6 Shift RegistersPart A:Design and build a 4-bit shift register with four D flip-flops and four 4-1 multiplexers.This circuit should be capable of performing the following functions:Mode Control:S0S1Regi
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 8 Sequence DetectorPart B:Design a sequential logic circuit to check an input stream labeled X and to produce anoutput Z=1 if the total number of zeros received is odd and the sequence 10 has occurredat lea
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 10 Traffic Light ControllerThere are many applications for controller circuits. One of them is a highway intersectiontraffic light. In this experiment you will design and implement a 4-way traffic lightcontr
LSU - EE - 2731
Jacob Porta and Mathew MapesExperiment 6Shift Regester3/20/04EE 2731Shift RegestarPart A Design and build a 4-bit shift register with four d flip-flops and four 4-1multiplexers. This dircuit should be capable of performing the following functions:
LSU - EE - 2731
Jacob Porta and Mathew MapesExperiment 10Traffic Light Controller4/21/04EE 2731Traffic Light ControllerDesign and build a sequential logig circuit that may be used to control the operation of a4-way traffic light that uses pressure sensors in the r
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 1 - Combinational Logic CircuitsPart A:Design and build a 4-input majority circuit using AND, OR, and NOT gates.Digital Inputs:Data Inputs:Select Lines:Clock:Digital Outputs:ZTruth Table:ABCD0000000
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 2 Decoders, Multiplexers, and DemultiplexersPart A:Digital Inputs:A) Data Inputs: D0, D1, D2, D3B) Select Lines: EN, A, BC) Clock: n/aDigital Output: YEN01111BX0011AX0101Y0I0I1I2I3
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 4 Flip-FlopsPart A:Construct A SR latch with two NAND gates.Digital Inputs:A. Data Inputs S & R from S1 and S2B. Select Lines NoneC. Clock NoneDigital Outputs:Q & QNTruth Table:S0011R0101QL
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 6 Shift RegistersPart A:Design and build a 4-bit shift register with four D flip-flops and four 4-1 multiplexers.This circuit should be capable of performing the following functions:Mode Control:S0S1Regi
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 8 Sequence DetectorPart B:Design a sequential logic circuit to check an input stream labeled X and to produce anoutput Z=1 if the total number of zeros received is odd and the sequence 10 has occurredat lea
LSU - EE - 2731
Jonathan BollingerRandall RobertExperiment 10 Traffic Light ControllerThere are many applications for controller circuits. One of them is a highway intersectiontraffic light. In this experiment you will design and implement a 4-way traffic lightcontr
LSU - EE - 2731
Michigan - ECON 310 - 12421