ARITHMETIC
Milo 1
DIGITAL D. Ercegovac and Toms Lang
s
a
Morgan Kaufmann Publishers, an imprint of Elsevier Science, c 2004
Chapter 8: Solutions to Exercises
with contributions by Fabrizio Lamberti
Exercise 8.1
Fixed-point representation
Plancks constant:
6.63 1027 0. 00000000000000000000000000663
29
Avogadros number:
6.02 1023 602000000000000000000000 .0
24
To represent the approximation of Plancks constant 6.631027 , 29 radix10 fractional digit are needed, while representing the approximation of
Avogadros number 6.02 1023 requires 24 integer digits. In conclusion,
to represent the approximations of both Plancks constant and Avogadros
number in a xed-point number format, 29 + 54 = 53 radix-10 digits are
needed.
Floating-point representation
In the considered radix-10 base-10 biased representation for the exponent
(such that Ebiased = E + 50), the exponent of both Plancks constant
6.63 1027 and Avogadros number 6.02 1023 can be represented using 2
digits, since 27+50 = 23 and 23+50 = 73. To represent the signicands,
3 radix-10 digits are needed. Therefore, to represent the approximations of
both Plancks constant and Avogadros number in a oating-point radix10 base-10 number format, 3 + 2 = 5 digits are needed.
Exercise 8.4
Since in a normalized representation the most signicant digit of the significand is always dierent from zero, if we assume a oating point representation
with f digits for the signicand and e digits for the exponent, the number of
values for the rst digit of the signicand depends on the base that is being considered. For instance, the rst four bits (one hexadecimal digit) have 8 values
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
2
for radix 2, 12 values for radix 4 and 15 values for radix 16. The values that can
be represented using the remaining f 4 digits of the signicand and e digits
of the exponent remain unchanged for dierent bases. Therefore we have
(a) System A has base 16 and system B has base 2
Since the number of normalized signicands for system A is 15 2f 4
and the number of normalized signicands for system B is 8 2f 4 , the
ratio between the number of oating-point numbers that are represented
by systems A and B is 15 .
8
(b) System A has base 16 and system B has base 4
Since the number of normalized signicands for system A is 15 2f 4
and the number of normalized signicands for system B is 12 2f 4 , the
ratio between the number of oating-point numbers that are represented
by systems A and B is 15 .
12
Exercise 8.7
In a normalized base-64 oating-point representation, the number of values
that can be represented with the rst digit is limited to 63. Therefore the
number of dierent signicands that can be represented with 48-bit signicands
is 63 2486 = 63 242 .
Exercise 8.10
Notice that for rounding toward zero only f fractional bits are required.
For rounding to nearest, one additional bit is required to take into account all
discarded bits (since the sticky bit T is not provided, we assume T = 0 for ties).
For rounding toward plus innity it is necessary to know the sign as well as
when all the bits to be discarded are zero.
s
0
0
0
0
0
exp
00011111
00100000
00011111
00011111
00100000
fraction
1111111111111
0000000000000
1111111111111
1111111111111
0000000000000
guard
1
s
0
0
0
0
0
exp
11111110
11111111
11111110
11111110
11111111
fraction
1111111111111
0000000000000
1111111111111
1111111111111
0000000000000
guard
1
s
1
1
1
1
1
exp
11111110
11111111
11111110
11111110
11111110
fraction
1111111111111
0000000000000
1111111111111
1111111111111
1111111111111
guard
1
Digital Arithmetic - Ercegovac & Lang 2004
round mode
RNE
RNO
RZ
RPINF
round mode
RNE
RNO
RZ
RPINF
round mode
RNE
RNO
RZ
RPINF
Chapter 8: Solutions to Exercises
3
Exercise 8.12
Hex-vector
00000000
80000000
A73FF801
A6800000
7F7FFFFF
00800000
7F800000
FF800000
7FC00000
Value
0.0
0.0
(1.01111111111100000000001)2 251
1.0 248
2 223 2127
1.0 2126
+
N AN
Exercise 8.16
A
B
C
D
Operation
Add
Add
Sub
Sub
X
000110001001111000
000110001001111000
000110001001111000
011111110111100011
Y
000110011100011101
100110011100011101
000110001001110111
111111100001010101
(A) EOP is ADD
Output of blocks in Fig. 8.5
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TSM ADD/SU B
OU T P U TL/R1SHIF T ER
OU T P U TROU N D(RN E )
OU T P U TEXP ON EN T U P DAT E (RN E )
OU T P U TROU N D(RZ )
OU T P U TEXP ON EN T U P DAT E (RZ )
OU T P U TROU N D(RP IN F )
OU T P U TEXP ON EN T U P DAT E (RP IN F )
OU T P U TROU N D(RM IN F )
OU T P U TEXP ON EN T U P DAT E (RM IN F )
OU T P U TSIGN
Digital Arithmetic - Ercegovac & Lang 2004
Value
2
00110011
1.001111000
0.01001111000
1.11011101100
1.11011101100
1.110111011
00110011
1.110111011
00110011
1.110111011
00110011
1.110111011
00110011
0
Chapter 8: Solutions to Exercises
4
(B) EOP is SUB
Output of blocks in Fig. 8.5
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TSM ADD/SU B
OU T P U TL/R1SHIF T ER
OU T P U TROU N D(RN E )
OU T P U TEXP ON EN T U P DAT E (RN E )
OU T P U TROU N D(RZ )
OU T P U TEXP ON EN T U P DAT E (RZ )
OU T P U TROU N D(RP IN F )
OU T P U TEXP ON EN T U P DAT E (RP IN F )
OU T P U TROU N D(RM IN F )
OU T P U TEXP ON EN T U P DAT E (RM IN F )
OU T P U TSIGN
Value
2
00110011
1.001111000
0.01001111000
1.00111111100
1.00111111100
1.001111111
00110011
1.001111111
00110011
1.001111111
00110011
1.001111111
00110011
1
(C) EOP is SUB
Output of blocks in Fig. 8.5
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TSM ADD/SU B
OU T P U TL/R1SHIF T ER
OU T P U TROU N D(RN E )
OU T P U TEXP ON EN T U P DAT E (RN E )
OU T P U TROU N D(RZ )
OU T P U TEXP ON EN T U P DAT E (RZ )
OU T P U TROU N D(RP IN F )
OU T P U TEXP ON EN T U P DAT E (RP IN F )
OU T P U TROU N D(RM IN F )
OU T P U TEXP ON EN T U P DAT E (RM IN F )
OU T P U TSIGN
Digital Arithmetic - Ercegovac & Lang 2004
Value
0
00110001
1.001110111
1.001110111
0.000000111
1.110000000
1.110000000
00101010
1.110000000
00101010
1.110000000
00101010
1.110000000
00101010
0
Chapter 8: Solutions to Exercises
5
(D) EOP is ADD
Output of blocks in Fig. 8.5
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TSM ADD/SU B
OU T P U TL/R1SHIF T ER
OU T P U TROU N D(RN E )
OU T P U TEXP ON EN T U P DAT E (RN E )
OU T P U TROU N D(RZ )
OU T P U TEXP ON EN T U P DAT E (RZ )
OU T P U TROU N D(RP IN F )
OU T P U TEXP ON EN T U P DAT E (RP IN F )
OU T P U TROU N D(RM IN F )
OU T P U TEXP ON EN T U P DAT E (RM IN F )
OU T P U TSIGN
Value
2
11111110
1.001010101
0.01001010101
10.00111100001
1.000111100001
1.000111100
11111110
1.000111100
11111110
1.000111101
11111110
1.000111100
11111110
0
Exercise 8.20
(a) Determine the delay of the oating-point adder in Fig. 8.5 for single and
double precision
Module
Exponent dierence
Swap (incl. buer for control)
Right shift
Add signicands (s+m)
LOD
Left shift (includes buer)
Round
Right shift (one pos., incl. buf.)
Special cases
Delay
Delay for
Single precision
1.4 ns
0.5 ns
1.0 ns
2.5 ns
1.5 ns
1.7 ns
1.0 ns
0.5 ns
0.8 ns
10.9 ns
Delay for
Double precision
1.7 ns
0.5 ns
1.2 ns
2.8 ns
1.8 ns
2 ns
1.2 ns
0.5 ns
0.8 ns
12.5 ns
(b) Pipeline the oating-point adder (for single and double precision) for a
clock rate of 200 Mhz (stage delay should not be larger than 80% of the
clock cycle)
Since a clock rate of 200M hz correspond to a clock cycle of 5 ns, stage
delay should not be larger that 4 ns. The oating-point adder for single
precision could be pipelined as follows (3 stages):
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
6
Ex
Ey
Mx = 1.Fx
EXPONENT
DIFFERENCE
0
sgn(d)
My = 1.Fy
sgn(d)
SWAP
1
MUX
d
d
R-SHIFTER
Ss
SM-ADD/SUB
EOP
ovf
EOP
Sy
LOD
Sx
L/R1-SHIFTER
sgn(d)
ovf_rnd
ROUND
Mz
SIGN
SPECIAL
CASES
exponent overflow/underflow,
zero, inexact, NAN
EXPONENT
UPDATE
(fraction only)
Sz
Ez
Figure E8.2: Pipelined implementation of the oating-point adder in
Figure 8.5 for single precision.
The oating-point adder for double precision could be pipelined as follows
(4 stages):
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
7
Ex
Ey
Mx = 1.Fx
EXPONENT
DIFFERENCE
0
sgn(d)
My = 1.Fy
sgn(d)
SWAP
1
MUX
d
d
R-SHIFTER
Ss
SM-ADD/SUB
EOP
ovf
EOP
Sy
L/R1-SHIFTER
Sx
sgn(d)
ovf_rnd
SIGN
LOD
ROUND
SPECIAL
CASES
EXPONENT
UPDATE
Mz
(fraction only)
Sz
exponent overflow/underflow,
zero, inexact, NAN
Ez
Figure E8.3: Pipelined implementation of the oating-point adder in
Figure 8.5 for double precision.
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
8
Exercise 8.23
A
B
C
D
Operation
Add
Sub
Sub
Sub
X
000110001001111000
000110001001111000
000110001001111000
011111110111100011
Y
001001100100011101
101001100100011101
000110001001110111
111111100001010101
(A) EOP is ADD
Output of blocks in Fig. 8.8
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TR1SHIF T ER
OU T P U TR1SHIF T ER
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TCON D.BIT IN V ERT
OU T P U TIN V ERT,ADD,ROU N D&IN V ERT
OU T P U TLSHIF T ER
OU T P U TADD,ROU N D&N ORM ALIZE
RN E (Sum)
RN E (Sum + one)
N ormalized
OU T P U TM U X
OU T P U TEXP ON EN T U P DAT E
OU T P U TSIGN
Value
27
01001100
1.001111000
0.000000000 001
0.000000000 001
1.100011101 001
1.100011101
1.100011101
1.100011101
01001100
0
(B) EOP is SUB
Output of blocks in Fig. 8.8
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TR1SHIF T ER
OU T P U TR1SHIF T ER
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TCON D.BIT IN V ERT
OU T P U TIN V ERT,ADD,ROU N D&IN V ERT
OU T P U TLSHIF T ER
OU T P U TADD,ROU N D&N ORM ALIZE
RN E (Sum)
RN E (Sum + one)
N ormalized
OU T P U TM U X
OU T P U TEXP ON EN T U P DAT E
OU T P U TSIGN
Digital Arithmetic - Ercegovac & Lang 2004
Value
27
01001100
1.001111000
0.000000000 001
1.111111111 001
1.100011101 001
1.100011101
1.100011101
1.100011101
01001100
1
Chapter 8: Solutions to Exercises
9
(C) EOP is SUB
Output of blocks in Fig. 8.8
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TR1SHIF T ER
OU T P U TR1SHIF T ER
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TCON D.BIT IN V ERT
OU T P U TIN V ERT,ADD,ROU N D&IN V ERT
OU T P U TLSHIF T ER
OU T P U TADD,ROU N D&N ORM ALIZE
RN E (Sum)
RN E (Sum + one)
N ormalized
OU T P U TM U X
OU T P U TEXP ON EN T U P DAT E
OU T P U TSIGN
Value
0
00110001
1.001110111
1.001110111
0.000000001
1.000000000
1.000000000
00101000
0
(D) EOP is ADD
Output of blocks in Fig. 8.8
OU T P U TEXP ON EN T DIF F EREN CE
OU T P U TM U X
IN P U TR1SHIF T ER
OU T P U TR1SHIF T ER
IN P U TRSHIF T ER
OU T P U TRSHIF T ER
OU T P U TCON D.BIT IN V ERT
OU T P U TIN V ERT,ADD,ROU N D&IN V ERT
OU T P U TLSHIF T ER
OU T P U TADD,ROU N D&N ORM ALIZE
RN E (Sum)
RN E (Sum + one)
N ormalized
OU T P U TM U X
OU T P U TEXP ON EN T
OU T P U TSIGN
U P DAT E
Digital Arithmetic - Ercegovac & Lang 2004
Value
2
11111110
1.001010101
0.010010101 010
0.010010101
10.001111000
10.001111000
1.000111100
Ez = 255 Mz = 0
(overow)
1.000111100
Ez = 255 Mz = 0
(overow)
11111111
0
Chapter 8: Solutions to Exercises
10
Exercise 8.25
Operation
A
B
X
001010101010110011
110011110101110010
Y
101111111101110011
111000111011111100
(A) Sz = 1
OU T P U TEXP.
OU T P U Tm
BIASED ADDIT ION :
by m
01010101
M U LT IP LIER : P [1, 2m 2] = 10.010101000000110001
P [1] = 1 normalize by shifting right by one (exponent must be incremented by one).
OU T P U TN ORM ALIZE : 1.00101010 0 01
L GT
Rounding: RNE (round down), RZ (round down), RPINF(round down),
RMINF(round up).
OU T P U TEXP ON EN T
U P DAT E :
01010110
(B) Sz = 0
OU T P U TEXP.
OU T P U Tm
BIASED ADDIT ION :
by m M U LT IP LIER :
11100110
P [1, 2m 2] = 10.100100100000111000
P [1] = 1 normalize by shifting right by one (exponent must be incremented by one).
OU T P U TN ORM ALIZE : 1.01001001 0 01
L GT
Rounding: RNE (round down), RZ (round down), RPINF(round up),
RMINF(round down).
OU T P U TEXP ON EN T
U P DAT E :
11100111
Exercise 8.29
Operation
A
B
X
001010101010111000
010000000001100000
Y
001010101010010000
001010101011000000
(A) Performing the computation of the multiplication using the basic implementation, the output of m by m M U LT IP LIER block: is P [1, 2m 2]
= 01.101111011110000000. Since P [1] = 0, T = 1. To determine the
value of the sticky bit directly from the operands of the multiplier we have
to compute the sum of the number of trailing zeros of X and Y (that is,
3 + 4 = 7). Since no normalization is required, we can say that not all
the discarded bits are zeros and, as a consequence, T = 1, as expected.
If we want to compute the value of the sticky bit using the carry-save
representation of the second half of the product, we need
P C [1 : 2m 3] = 00.10111100000000000 and
P S [1 : 2m 2] = 01.000000011110000000.
P C [m + 1 : 2m 3] = 0000000 and
P S [m + 1 : 2m 2] = 10000000.
Digital - Arithmetic Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
11
10000000
00000000
01111111
0000000
0111111
s
c
z
t
w
Therefore, T = N AN D(wi ) = 1 as expected.
(B) Performing the computation of the multiplication using the basic implementation, the output of m by m M U LT IP LIER block: is P [1, 2m 2]
=01.101000100000000000. Since P [1] = 0, T = 0. To determine the
value of the sticky bit directly from the operands of the multiplier we
have to compute the sum of the number of trailing zeros of X and Y (that
is, 5 + 6 = 11). Since no normalization is required, we can say that all
the discarded bits are zeros and, as a consequence, T = 0, as expected.
If we want to compute the value of the sticky bit using the carry-save
reresentation of the second half of the product, we need
P C [1 : 2m 3] = 00.01001000000000000 and
P S [1 : 2m 2] = 01010110100000000000.
P C [m + 1 : 2m 3] = 0000000 and
P S [m + 1 : 2m 2] = 00000000.
00000000
00000000
11111111
0000000
1111111
s
c
z
t
w
Therefore, T = N AN D(wi ) = 0 as expected.
Exercise 8.31
(a) Round to zero
For rounding to zero, the result is simply truncated to m bits and no
additional operation is required.
(b) Round to plus innity
Rpinf =
Mf + rf
Mf
if
if
Md > 0 and S = 0
Md = 0 or S = 1
In this case, a 1 should be added to position R (bit m) if S = 0 (where
S is the sign of the result) and Md > 0 (that is if the sticky bit T = 1).
However, the result can be either normalized or unnormalized, while the
rounding if performed before knowing whether the result is normalized.
Therefore, the following quantities have to be calculated:
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
12
P 0 = P M + cm + S T 2m
T + 1 2m
P 1 = P M + cm + S
up to position L (bit m 1).
The rounded result is obtained by selecting
P=
P0
21 P 1
if
if
P 0[1] = 0
P 0[1] = 1
that is if there is no overow, select P 0, while if there is overow, select
P 1, shift right and truncate at resulting bit L.
Proof
In all cases cm needs to be added to position R (bit m). In case there is
no overow the result is truncated at position L. In the following cases a
1 needs to be added to position L:
ST =1
S T = 0 and bit of sum in position R = 1
Both cases are accounted for by adding S T +1 in position R. In case there
is overow the result is truncated at bit L 1 and shifted one bit right.
Before shifting a 1 needs to be added to position L 1 in the following
situations:
ST =1
S T = 0 and bit of sum in position L or R = 1
All cases are accounted for by adding S T + 1 in position R and selection
P 0 + 1 in case of overow. This is because if S T = 1 adding 2 to position
R corresponds to adding 1 to position L, so selection P 0 + 1 corresponds
to adding 2 to position L or 1 to L 1. On the contrary, if S T = 0,
if R = 1 then when 1 is added to R there is a carry to position L, so 1
is added to L, while if R = 0 and L = 1 then adding 1 to P 0 produces
a carry to bit L 1 so that P 0 + 1 truncated to bit l 1 corresponds to
adding 1 to bit L 1.
The implementation consists of an array of HAs and FAs, which adds 1 to
3 to position R (that is, add cm S T to bit R and cm + S T to bit
L), a compound adder producing P0 and P 0 + 1, The complete process
then requires a row of HAs and FAs, a compound adder that computes
the sum P 0 and the sum plus 1 and a multiplexer which selects P 0 or the
normalized (shifted) P 1 depending whether P 0 overows or not.
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
13
L
PS[-1..m-2]
PS[m-1]
PC[-1..m-2]
PS[m]
(cm+S T+1) 2-m
PC[m-1] PC[m]
m
m
m Half Adders
m+2
PC*
G
FA
FA
m+2 PS*
COMPOUND ADDER
P0[-1]
P0[0]
P1[0]
P1[1..m]
P0[1..m]
(shifted)
MUX
P[1..m]
m-1
Fz [1..m-1]
rounded & normalized
fraction of the result significand
Figure E8.6: Alternative implementation modied to perform round to
plus innity.
(c) Round to minus innity
Rminf =
Mf + rf
Mf
if
if
Md > 0 and S = 1
Md = 0 or S = 0
The algorithm for rounding to minus innity is therefore the same used
for rounding to plus innity, except that S should be substituted with S .
Exercise 8.34
X
001010101010110011
Y
101111111101110011
W
110011110101110010
Output of the m by m M U LT IP LIER CS :
P S 01.101000001101101001
P C 00.101100110000000000
Computing d = 42 + 0 31 + m + 3 we get d = 60 (since m = 10).
Therefore no right shift is needed and the output of the RIGHT SHIF T ER
block is 1.101110010.
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
14
PS
01.101000001101101001
PC
00.101100110000000000
Addend
1.101110010 00
---------------------------------------------------S
1.101110010 00 01 000100111101101001
C
0.000000000 00 01 010000000000000000
Adder output
1.101110010 00 10 010100111101101001
L GR T
The output of the adder does not require any realignement/normalization
left shift since it is already normalized (leading 1 in the left most position).
Rounding mode
RNE
RZ
RPINF
RMINF
Round
Round
Round
Round
down
down
down
up
The output of the EXP ON EN T U P DAT E block is max(Ex + Ey , Ew ) =
Ew . Finally, the result is negative (Sz = 1).
Exercise 8.38
A
B
X
001010101011010011
110011110001011010
Y
101111111110110011
111000111101011101
(A) Let Q be the result. The sign and exponent of the result are then
Sq
Eq
=
=
Sx Sd = 1
Ex Ed + 127 = 01010101
The signicand of the result is then calculated as
Mq =
1.011010011
0.1011010011
Mx
=
=
Md
1.110110011
0.1110110011
The last conversion is necessary in order to be able to use the quotientdigit selection function of the implementation presented in Section 5.3.1.
Since n = 10, the number of iterations to be performed is n + 2 = 12. The
initialization is as follows:
scaled residual 2w[0] = 2(x/2) = x, qcomputed = q/2
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
15
2WS[0]
2WC[0]
q1 d
2WS[1]
2WC[1]
q2 d
2WS[2]
2WC[2]
q3 d
2WS[3]
2WC[3]
q4 d
2WS[4]
2WC[4]
q5 d
2WS[5]
2WC[5]
q6 d
2WS[6]
2WC[6]
q7 d
2WS[7]
2WC[7]
q8 d
2WS[8]
2WC[8]
q9 d
2WS[9]
2WC[9]
q10 d
2WS[10]
2WC[10]
q11 d
WS[11]
WC[11]
000.1011010011
000.0000000001
111.0001001100
111.0100111100
000.0100000100
000.0000000000
110.0001110000
001.0000010000
000.1110110011
111.1110100110
000.0011000001
111.0001001100
001.1001010110
100.1100010000
000.1110110011
011.0111101010
011.0001001000
000.1110110011
001.0000100010
101.1110101000
000.1110110011
000.0001110010
111.1010001000
000.0000000000
111.0111110100
000.0000000000
000.0000000000
110.1111101000
000.0000000000
000.1110110011
100.0010110110
011.1010000000
000.0000000000
111.1000110110
000.0100000000
y [0]=0.5
q1 = 1
y [1]=-1/2
q2 = 0
y [2]=-1
q3 = 1
y [3]=0
q4 = 1
y [4]=-1
q5 = 1
y [5]=-2
q6 = 1
y [6]=-1
q7 = 1
y [7]=-1/2
q8 = 0
y [8]=-1/2
q9 = 0
y [9]=-3/2
q10 = 1
y [10]=-1/2
q11 = 0
y [11]=-1/2
q12 = 0
Since the last residual is negative, the last bit has to be corrected, therefore
q12 = 1. The computed result is then, which however has to be shifted
left 1 position since the computed result is q/2. The signicand before
normalization and rounding is then Mq =0.11000011011.
After normalization (Mq =1.1000011011 and Eq =01010100) the result has
f + 1 fractional bits. For round-to-nearest, 2(f +1) has to be added to the
result; therefore the rounded signicand is
1.1000011011 +
0.0000000001
-----------1.1000011100
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
16
The nal result expressed in the IEEE Standard format is
Q = 0|01010100|1000011100
(B) Let Q be the result. The sign and exponent of the result are then
Sq
Eq
=
=
Sx Sd = 0
Ex Ed + 127 = 11010110
The signicand of the result is then calculated as
Mq =
Mx
1.001011010
0.1001011010
=
=
Md
1.101011101
0.1101011101
The last conversion is necessary in order to be able to use the quotientdigit selection function of the implementation presented in Section 5.3.1.
Since n = 10, the number of iterations to be performed is n + 2 = 12. The
initialization is as follows:
scaled residual 2w[0] = 2(x/2) = x, qcomputed = q/2
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
17
2WS[0]
2WC[0]
q1 d
2WS[1]
2WC[1]
q2 d
2WS[2]
2WC[2]
q3 d
2WS[3]
2WC[3]
q4 d
2WS[4]
2WC[4]
q5 d
2WS[5]
2WC[5]
q6 d
2WS[6]
2WC[6]
q7 d
2WS[7]
2WC[7]
q8 d
2WS[8]
2WC[8]
q9 d
2WS[9]
2WC[9]
q10 d
2WS[10]
2WC[10]
q11 d
WS[11] =
WC[11] =
000.1001011010
000.0000000001
111.0010100010
111.0111110010
000.0000001000
000.0000000000
110.1111110100
000.0000000000
000.1101011101
100.0101010010
011.0101010000
000.0000000000
110.0000000100
001.0101000000
000.0000000000
110.1010001000
000.0000000000
000.1101011101
100.1110101010
010.0000100000
000.1101011101
100.0110101110
011.0010100000
000.0000000000
110.1000011100
000.1010000000
000.0000000000
100.0100111000
010.0000000000
000.1101011101
101.0011001010
001.0001100000
000.1101011101
100.1111110111
010.0010010000
y [0]=0.5
q1 = 1
y [1]=-1/2
q2 = 0
y [2]=-1
q3 = 1
y [3]=-1/2
q4 = 0
y [4]=-1/2
q5 = 0
y [5]=-1
q6 = 1
y [6]=-1
q7 = 1
y [7]=-1/2
q8 = 0
y [8]=-1/2
q9 = 0
y [9]=-1
q10 = 1
y [10]=-1
q11 = 1
y [11]=-1
q12 = 1
The computed result is then
q = .10 = .010110011001
1001100111
which has to be corrected by subtracting one in the last position since the
last residual is negative and thus
q = .010110011000
Moreover, the result has to be shifted left 1 position since the computed
result is q/2. The signicand before normalization and rounding is then
Mq = 0.10110011000. After normalization (Mq = 1.0110011000 and Eq =
11010101) the result has f +1 fractional bits. For round-to-nearest,2(f +1)
has to be added to the result; therefore the rounded signicand is
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
18
1.0110011000 +
0.0000000001
-----------1.0110011001
The nal result expressed in the IEEE Standard format is
Q = 0|11010101|011001100
Exercise 8.41
A
B
X
001010101011010011
110011110001011010
Y
101111111110110011
111000111101011101
(A) Let Q be the result. The sign and exponent of the result are then
Sq
Eq
=
=
Sx Sd = 1
Ex Ed + 127 = 10011111
The signicand of the result is then calculated as
Mq =
1.011010011
Mx
=
Md
1.110110011
The method requires the calculation of an initial approximation of the
reciprocal of the divisor (of 4 bits in this case), which can be obtained, for
instance, by means of a lookup table. The initial approximation is 0.1000.
The number of iterations to be performed is then
m = log2
n
k
= log2
9
4
=2
Since this algorithm is not self-correcting, all multiplications are performed
using a 16 bits multiplier. The algorithm is as follows (assuming that multiplications are performed using a oating-point multiplier with rounding
to nearest):
1. P [0] = 0.1000 (initial approximation of 1/d)
2. d[0] = d P [0] = 1.110110011000000 21
R[0] = x P [0] = 1.011010011000000 21
3. P [1] = 2 d[0] = 1.000100110100000 20
d[1] = d[0] P [1] = 1.111111010001101 21
R[1] = R[0] P [1] = 1.100001001010111 21
4. P [2] = 2 d[1] = 1.000000010111010 20
R[2] = R[1] P [2] = 1.100001101110001 21
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises
19
The nal q , rounded to the nal number of bit, is then 1.100001110. The
nal result expressed in the IEEE Standard format is
Q = 0|01010100|100001110
(B) Let Q be the result. The sign and exponent of the result are then
Sq
Eq
=
=
Sx Sd = 0
Ex Ed + 127 = 01111100
The signicand of the result is then calculated as
Mq =
1.001011010
Mx
=
Md
1.101011101
The method requires the calculation of an initial approximation of the
reciprocal of the divisor (of 4 bits in this case), which can be obtained, for
instance, by means of a lookup table. The initial approximation is 0.1001.
The number of iterations to be performed is then
m = log2
n
k
= log2
9
4
=2
Since this algorithm is not self-correcting, all multiplications are performed
using a 16 bits multiplier. he algorithm is as follows (assuming that multiplications are performed using a oating-point multiplier with rounding
to nearest):
1. P [0] = 0.1001 (initial approximation of 1/d)
2. d[0] = d P [0] = 1.111001000101000 21
R[0] = x P [0] = 1.010100101010000 21
3. P [1] = 2 d[0] = 1.000011011101100 20
d[1] = d[0] P [1] = 1.111111101000000 21
R[1] = R[0] P [1] = 1.011001001111000 21
4. P [2] = 2 d[1] = 1.000000001100000 20
R[2] = R[1] P [2] = 1.011001011111110 21
The nal q , rounded to the nal number of bit, is then 1.011001100. The
nal result expressed in the IEEE Standard format is
Q = 0|11010101|011001100
Exercise 8.44
Round to nearest is performed by adding 2(f+1) and truncating to f bit.
Overow can occur if q + 2(f +1) 2.
Since the normalized signicand is in the range 1 1.F 2 2f , the
2f
quotient is comprised in the range 21f q 21 .
2
Therefore we obtain q 2 2f q + 2(f +1) 2 2f + 2(f +1) =
2 2(f +1) < 2. Since q + 2(f +1) < 2, the overow condition is never satised.
Digital Arithmetic - Ercegovac & Lang 2004
Chapter 8: Solutions to Exercises