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Course: CSE ss zg513 , Spring 2011School: Birla Institute of...
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Institute Birla of Technology & Science, Pilani Distance Learning Programmes Division First Semester 2008-2009 Mid-Semester Test (EC-1 Regular) Course No. Course Title Nature of Exam Weightage Duration Date of Exam Note: 1. 2. 3. 4. : SS ZG515 : DATA WAREHOUSING : Closed Book : 40% : 2 Hours : 02/08/2008 (AN) No. of Pages =1 No. of Questions = 5 Please follow all the Instructions to Candidates given on...
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Institute Birla of Technology & Science, Pilani Distance Learning Programmes Division First Semester 2008-2009 Mid-Semester Test (EC-1 Regular) Course No. Course Title Nature of Exam Weightage Duration Date of Exam Note:
1. 2. 3. 4.
: SS ZG515 : DATA WAREHOUSING : Closed Book : 40% : 2 Hours : 02/08/2008 (AN)
No. of Pages =1 No. of Questions = 5
Please follow all the Instructions to Candidates given on the cover page of the answer book. All parts of a question should be answered consecutively. Each answer should start from a fresh page. Mobile phones and computers of any kind should not be used inside the examination hall. Use of any unfair means will result in severe disciplinary action.
Q.1 (a). Q.1 (b).
Dimensional modeling is more restrictive than Entity-Relationship modeling. Comment. Several distortions of the classical schema star are permissible. Describe them and the circumstances under which they are justified. [4 + 4 = 8]
Q.2
Most of the analysis has a time component. Explain what role time dimension plays in such analysis. Why it is recommended to have a separate time dimension rather than having the date as one of the attributes in the fact table? Where from does one get the time dimension? [8] Why it is recommended that the dimension tables in a star schema be denormalized? What is the highest normal form of the dimension tables and the fact tables? [8] What are inside-out and outside-in queries? What are dimension-focused and factfocused queries? Give one example of each type of query. [8] What are the strengths and weaknesses of the relational technology when it comes to using it for data warehouses? [8]
Q.3
Q.4
Q.5
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Birla Institute of Technology and Science - CSE - ss zg513
Birla Institute of Technology & Science, Pilani Distance Learning Programmes Division Second Semester 2007-2008 Mid-Semester Test (EC-1 Regular) Course No. Course Title Nature of Exam Weightage Duration Date of Exam Note:1. 2. 3. 4.: SS ZG515 : DATA WAR
Birla Institute of Technology and Science - CSE - ss zg513
Birla Institute of Technology & Science, Pilani Distance Learning Programmes Division First Semester 2007-2008 Mid-Semester Test (EC-1 Regular) Course No. Course Title Nature of Exam Weightage Duration Date of Exam Note:1. 2. 3. 4.: SS ZG515 : DATA WARE
Birla Institute of Technology and Science - CSE - ss zg513
Birla Institute of Technology & Science, Pilani Distance Learning Programmes Division Second Semester 2006-2007 Mid-Semester Test (EC-1 Regular) Course No. Course Title Nature of Exam Weightage Duration Date of Exam Note:1. 2. 3. 4.: IS ZC415 : DATA MIN
BYU - CS - 124
Adding Binary NumbersA key requirement of digital computers is the ability to use logical functions to perform arithmetic operations. The basis of this is addition; if we can add two binary numbers, we can just as easily subtract them, or get a little fa
BYU - CS - 124
Basic Logical Functions and GatesWhile each logical element or condition must always have a logic value of either "0" or "1", we also need to have ways to combine different logical signals or conditions to provide a logical result. For example, consider
BYU - CS - 124
Boolean AlgebraOne of the primary requirements when dealing with digital circuits is to find ways to make them as simple as possible. This constantly requires that complex logical expressions be reduced to simpler expressions that nevertheless produce th
BYU - CS - 124
Chapter 1 AbstractionWhat's inside this thing?ComputersComputers.There is no magic to computing. Computers do not have minds of their own. Computers follow our instructions exactly. Computers are made of very simple parts, albeit, fast parts and a w
BYU - CS - 124
CS/ECEn 124 Chapter 2 Binary Digital System Data Types Conversions Binary Arithmetic Overflow Fixed Point Floating Point Hexadecimal Numbers ASCII CharactersChapter 2 - Data Types 1BYU CS/ECEn 124Digital Binary SystemWhat are Decimal Numbers?"Decim
BYU - CS - 124
Chapter 3 - Digital LogicB AThe TransistorHistory of the TransistorAround 1945, Bell Labs scientists discovered that silicon was comprised of two distinct regions differentiated by the way in which they favored current flow. The area that favored posi
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Chapter 4 The Von Neumann ModelTopics to Cover. BYU CS/ECEn 124Von Neumann vs. Harvard MSP430 Architecture RISC / CISC Anatomy of an Instruction MSP430 Instructions Instruction Cycles Clocks MSP430 Finite State MachineChapter 4 - The Von Neumann Mode
BYU - CS - 124
Chapter 5 MSP430 ISA The Instruction SetThe "Gap"Where Are We?Problems Algorithms Language (Program) Machine (ISA) Architecture Micro-architecture Circuits BYU CS/ECEn 124 Devices Chapter 05 - MSP430 ISA 2 ProgrammableComputer Specific Manufacturer Sp
BYU - CS - 124
Chapter 6 MSP430 Micro-ArchitectureLevels of TransformationProblems Algorithms Language (Program) Machine (ISA) Architecture Microarchitecture Circuits DevicesBYU CS/ECEn 124 Chapter 6 MSP430 MicroArchitecture 2ProgrammableComputer Specific Manufactu
BYU - CS - 124
Chapter 7 MSP430 Assembler / LinkerTopics to Cover.High Level vs. Assembly MSP430 Assembler Assembly Code Assembly Process Assembly Directives Assembly Sections Linker Libraries Code Composer Essentials/Studio Device: LED's Systematic Decomposition Asse
BYU - CS - 124
Chapter 10 eZ430X+Coding AssemblerHow To Code Assembler. Understand the problem (obviously) Until you are comfortable in assembly, (and even afterwards), write out your solution in something familiar English Flowchart Pseudo-code Java, C, Ruby the
BYU - CS - 124
INTRODUCTION TO COMPUTING SYSTEMS CS/ECEn 124 Course Syllabus Winter 2012 Instructor: Paul Roper Office: 3370 TMCB, 422-8149 Office Hours: MWF 9:00-10:50 AM Email: proper@cs.byu.edu Section 001 MWF 1:00-1:50 PM 1170 TMCB Section 002 MWF 3:00-3:50 PM 1170
BYU - CS - 124
Derived Logical Functions and GatesWhile the three basic functions AND, OR, and NOT are sufficient to accomplish all possible logical functions and operations, some combinations are used so commonly that they have been given names and logic symbols of th
BYU - CS - 124
Deriving the XOR FunctionOn the previous page we stated that the Exclusive-OR, or XOR function can be described verbally as, "Either A or B, but not both." In the realm of digital logic there are several ways of stating this in a more detailed and precis
BYU - CS - 124
Digital LogicDigital or binary logic has fascinated many people over the years. The very idea that a two-valued number system can possibly be the basis for the most powerful and sophisticated computers seems astounding, to say the least. Nevertheless, it
BYU - CS - 124
CHAPTER 1Embedded Electronic Systems and MicrocontrollersThis chapter provides a short introduction to embedded electronic systems, where they are used, and ways in which they can be implemented. Microcontrollers were originally developed from microproc
BYU - CS - 124
CHAPTER 2The Texas Instruments MSP430This chapter provides a review of the most important aspects of the hardware of the MSP430. It is a product of Texas Instruments, which I abbreviate to TI. The aim is to cover enough background for Chapter 4, where I
BYU - CS - 124
Development future of programming, but my impression is that the reception has been fairly cool. Maybe this is just conservatism or perhaps more development is needed. I had little success with this approach but put it down to lack of experience.553.3A
BYU - CS - 124
CHAPTER 5Architecture of the MSP430 ProcessorThe chapter describes the central processing unit (CPU) of the MSP430 and its most closely associated modules, the clock generator and reset circuitry. The earlier parts of the chapter, which cover the CPU an
BYU - CS - 124
Architecture of the MSP430 Processor141Peculiarities: There are tests for the conditions < and but not for nor >. It may be possible to choose the source and destination in a comparison to avoid this problem. Unfortunately the asymmetric addressing mode
BYU - CS - 124
132Chapter 5used in comparison, arithmetic, and logic operations and for masks to pick out bits 03. It is no accident that the most commonly tested bits in the status register are in these positions (Figure 5.3) and the same is true for registers in oth
BYU - CS - 124
Architecture of the MSP430 Processor153If you use C, you could try writing the code for the shift register in a more elegant way than the preceding snippet. This treats the register as a byte for the shift but as bits to insert the new value. Would a un
BYU - CS - 124
CHAPTER 5Architecture of the MSP430 ProcessorThe chapter describes the central processing unit (CPU) of the MSP430 and its most closely associated modules, the clock generator and reset circuitry. The earlier parts of the chapter, which cover the CPU an
BYU - CS - 124
186Chapter 6Check first to see whether an intrinsic function is available to do the job without leaving C. Many of these are declared in the header file intrinsics.h to perform functions that are not possible in standard C. For example, the _ _swap_byte
BYU - CS - 124
CHAPTER 6Functions, Interrupts, and Low-Power ModesA well-structured program should be divided into separate modules-functions in C or subroutines in assembly language. There is nothing special about this in embedded systems. If you wish to write subrou
BYU - CS - 124
330Chapter 8by one interval of two cycles. (The frequency would be 877.7 Hz if this pattern were the exact output.) The two durations are clear on the oscilloscope trace. The signal sounds terrible and is quite unusable, even if its average frequency is
BYU - CS - 124
CHAPTER 8TimersMost modern microcontrollers provide a range of timers and the MSP430 is no exception. All devices contain two types of timer and some have five. Each type of timer module works in essentially the same way in all devices. Timer_A is ident
BYU - CS - 124
Mixed-Signal Systems: Analog Input and Output393Schmitt trigger and interrupts on standard digital inputs can be used for the measurement instead of a comparator.9.2Analog-to-Digital Conversion: General IssuesAlthough Comparator_A produces digital va
BYU - CS - 124
Mixed-Signal Systems: Analog Input and Output Example 9.12475Modify Listing 9.12 so that the intensity of the LED responds to the ambient light in the opposite way: The LED gets brighter as the surroundings become darker. It is a lot easier to test this
BYU - CS - 124
534Chapter 10transmission. The results were strange because of the problems that I mentioned in the section "Digital Input and Output: Parallel Ports" on page 208. Enabling the pull resistor removes the full drive from the pin, so the sharp edges in Fig
BYU - CS - 124
Chapter 10Watchdog Timer+The watchdog timer+ (WDT+) is a 16-bit timer that can be used as a watchdog or as an interval timer. This chapter describes the WDT+ The WDT+ is implemented in all MSP430x2xx devices.TopicPage10.1 Watchdog Timer+ Introduction
BYU - CS - 124
Negative Numbers and Binary SubtractionWe have seen how simple logic gates can perform the process of binary addition. It is only logical to assume that a similar circuit could perform binary subtraction. If we look at the possibilites involved in subtra
BYU - CS - 124
Chapter 3RISC 16 Bit CPUThis chapter describes the MSP430 CPU, addressing modes, and instruction set.Topic3.1 3.2 3.3 3.4PageCPU Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 CPU Registers
BYU - CS - 124
The 1-to-2 Line Decoder/DemultiplexerThe opposite of the multiplexer circuit, logically enough, is the demultiplexer. This circuit takes a single data input and one or more address inputs, and selects which of multiple outputs will receive the input sign
BYU - CS - 124
The Two-Input MultiplexerOne circuit I've received a number of requests for is the multiplexer circuit. This is a digital circuit with multiple signal inputs, one of which is selected by separate address inputs to be sent to the single output. It's not e
BYU - CS - 124
Prefix b c l n p w dw f fn fp t g u Type BYTE charUsage Signed 8-bit value Signed 8-bit value (usually an ASCII character) long Signed 32-bit value int Signed 16-bit value U16 : pointer Generic prefix for a pointer to the next type U16 : WORD Unsigned
BYU - CS - 124
Chapter 5 MSP430 ISA The Instruction SetTopics to Cover.n n n n n n n nMSP430 ISA Instruction Formats Double Operand Instructions Single Operand Instructions Jump Instructions Addressing Modes Instruction Disassembly Emulated InstructionsBYU CS/ECEnC
BYU - CS - 124
Clock accuracy in ppmCrystal Clock accuracy is defined in terms of ppm or parts per million and it gives a convenient way of comparing accuracies of different crystal specifications. . The following headings give practical calculations showing the typica
BYU - CS - 124
CS/ECEn 124, W2012 Homework #1 Abstraction (Ch 2)Questions:NameSectionScore/ 41Answers:1. (3 points) Can a higher level programming language instruct a computer to compute more than a lower level programming language? Explain.2. (3 points) Name th
BYU - CS - 124
CS/ECEn 124, W2012 Homework #2 Digital Logic (Ch 3)Questions:NameSectionScore/ 38Answers:1. (4 points) How many select lines and how many output lines do the following multiplexers have? a. b. c. d. 32-input multiplexer 16-input multiplexer 5-input
BYU - CS - 124
CS/ECEn 124, W2012 Homework #3 Digital Logic (Ch 3)Questions:NameSectionScore/46Answers:1. (10 points) Identify the type of logic (combinational or sequential) for each of the following: a. ALU b. D-latch c. Decoder d. Driver e. Flip-Flop f. Invert
BYU - CS - 124
CS/ECEn 124, W2012 Homework #4 Von Neumann (Ch 4) MSP430 ISA (Ch 5)Questions:NameSectionScore/ 47Answers:1. (11 points) For each statement below, indicate if a CISC or RISC architecture is best described: a. b. c. d. e. f. g. h. i. j. k. Cheaper pr
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CS/ECEn 124, W2012 Homework #7 Stacks (Ch 8) Interrupts (9)Questions:NameSectionScore/ 36Answers:1. (3 points) Define subroutine cohesion. What properties of cohesion should be found in your subroutines?2. (3 points) Define subroutine coupling. Wh
BYU - CS - 124
An introduction to the TI MSP430 low-power microcontrollers OverviewThe MSP430 is a very clean 16-bit byte-addressed processor with a 64K unified address space, and memorymapped peripherals. The current family includes a variety of on-chip peripherals, a
BYU - CS - 124
AN-1023APPLICATION NOTEOne Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.comFall Detection Application by Using 3-Axis Accelerometer ADXL345by Ning JiaINTRODUCTIONADXL345 MEMS ACCELEROMETE
BYU - CS - 124
AN-1025APPLICATION NOTEOne Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.comUtilization of the First In, First Out (FIFO) Buffer in Analog Devices, Inc.Digital Accelerometersby Christopher
BYU - CS - 124
3-Axis, 2 g/4 g/8 g/16 g Digital Accelerometer ADXL345FEATURESUltralow power: as low as 40 A in measurement mode and 0.1 A in standby mode at VS = 2.5 V (typical) Power consumption scales automatically with bandwidth User-selectable resolution Fixed 10-
BYU - CS - 124
AccelerometersFantasy & RealityBy Harvey Weinberg [harvey.weinberg@analog.com]As applications engineers supporting ADIs compact, low-cost, gravity-sensitive iMEMsaccelerometers, we get to hear lots of creative ideas about how to employ accelerometers i
BYU - CS - 124
Adding Binary NumbersA key requirement of digital computers is the ability to use logical functions toperform arithmetic operations. The basis of this is addition; if we can add twobinary numbers, we can just as easily subtract them, or get a little fa
BYU - CS - 124
ASCII Chart012345670NULDLESP0@P`p1SOHDC1!1AQaq2STXDC2"2BRbr3ETXDC3#3CScsOr here's another chart:4EOTDC4$4DTdt5ENQNAK%5EUeu6ACKSYN&6FVfv7BELETB'7GWgw8BSCAN(8HXhx9HT
BYU - CS - 124
Basic Logical Functions andGatesWhile each logical element or condition must always have a logic value ofeither "0" or "1", we also need to have ways to combine different logical signalsor conditions to provide a logical result.For example, consider
BYU - CS - 124
Boolean AlgebraOne of the primary requirements when dealing with digital circuits is to findways to make them as simple as possible. This constantly requires that complexlogical expressions be reduced to simpler expressions that nevertheless produceth
BYU - CS - 124
PrefixbclnpwdwffnfptguTypeBYTEcharUsageSigned 8-bit valueSigned 8-bit value (usually anASCII character)longSigned 32-bit valueintSigned 16-bit valueU16 : pointerGeneric prefix for a pointer to thenext typeU16 : WORDUnsigned 16
BYU - CS - 124
Node:Top, Next:Preface, Previous:(dir), Up:(dir)C Programming Tutorial (K&R version 4)This is a C Programming Tutorial for people who have a little experience with aninterpreted programming language, such as Emacs Lisp or a GNU shell.Edition 4.02Copy
BYU - CS - 124
Formatting with printfThe example program above does not produce a very neat layout on the screen. Theconversion specifiers in the printf string can be extended to give more information.The % and the character type act like brackets around the extra in
BYU - CS - 124
Arrays as ParametersWhat happens if we want to pass an array as a parameter? Does the program copy theentire array into local storage? The answer is no because it would be a waste of timeand memory. Arrays can be passed as parameters, but only as varia
BYU - CS - 124
feof()This function returns a true or false result. It tests whether or not the end of a file hasbeen reached and if it has it returns `true' (which has any value except zero); otherwisethe function returns `false' (which has the value zero). The form
BYU - CS - 124
Listing Cref.c123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354/*//**//* C programming utility : variable referencer*//**//*//* See notes abov