Of Kingdom Saudi Arabia
Al-Imam Muhammad Ibn Saud Islamic University
College of Computer and Information Sciences
Information System Department
1st semester, 2010 2011
CS 224: Computer Organization
Digital Logic Circuits
Chapter 1 in Computer System Architecture
T. Hala A. Al-Rumaih
1
Flip-Flops
Although every digital system is likely to have a combinational
circuit, most systems encountered in practice also include
storage elements, which require that the system be described
in terms of sequential circuits.
The most common type of sequential circuit is the synchronous
type.
Synchronous sequential circuits employ signals that affect the
storage elements only at discrete instants of time.
Synchronization is achieved by a timing device called a clock
pulse generator that produces a periodic train of clock pulses.
The clock pulses are distributed throughout the system in such
a way that storage elements are affected only with the arrival of
the synchronization pulse.
2
Flip-Flops (Cont.)
Clocked synchronous sequential circuits are the type most frequently
encountered in practice.
They seldom manifest instability problems and their timing is easily broken
down into independent discrete steps, each of which may be considered
separately.
Clocked Sequential Circuit:
The storage elements employed in clocked sequential circuits are called flip-
flops.
A flip-flop is a binary cell capable of storing one bit of information.
It has two outputs, one for the normal value and one for the complement
value of the bit stored in it.
A flip-flop maintains a binary state until directed by a clock pulse to switch
states.
The difference among various types of flip-flops is in the number of inputs
they possess and in the manner in which the inputs affect the binary state.
3
Flip-Flops (Cont.)
SR Flip-Flop:
The graphic symbol of the SR flip-flop is :
It has three inputs, labeled S (for set), R (for reset), and C (for
clock).
It has an output Q and sometimes the flip-flop has a
complemented output, which is indicated with a small circle at
the other output terminal.
4
Flip-Flops (Cont.)
There is an arrowhead-shaped symbol in front of the letter C to
designate a dynamic input.
The dynamic indicator symbol denotes the fact that the flip-flop
responds to a positive transition (from 0 to 1) of the input clock
signal
The operation of the SR flip-flop is as follows:
If there is no signal at the clock input C, the output of the circuit cannot
change irrespective of the values at inputs S and R.
Only when the clock signal changes from 0 to 1 can the output be
affected according to the values in inputs S and R.
If S = 1 and R = 0 when C changes from 0 to 1, output Q is set to 1.
If S = 0 and R = 1 when C changes from 0 to 1, output Q is cleared to 0. If
both S and R are 0 during the clock transition, the output does not change.
When both S and R are equal to 1, produces an indeterminate next state.
5
Flip-Flops (Cont.)
D Flip-Flop:
The D (data) flip-flop is a slight modification of the SR flip-flop.
An SR flip-flop is converted to a D flip-flop by inserting an
inverter between S and R and assigning the symbol D to the
single input.
The D input is sampled during the occurrence of a clock
transition from 0 to 1.
If D = 1, the output of the flip-flop goes to the 1 state, but if D =
0, the output of the flip-flop goes to the 0 state.
The graphic symbol and characteristic table of the D flip-flop
are:
6
Flip-Flops (Cont.)
The relationship can be expressed by a characteristic equation:
Q(t + 1) = D
This means that the Q output of the flip-flop receives its value from the D
input every time that the clock signal goes through a transition from 0 to 1.
Note that no input condition exists that will leave the state of the D flip-flop
unchanged.
Although a D flip-flop has the advantage of having only one input (excluding
C), it has the disadvantage that its characteristic table does not have a "no
change" condition Q(t + 1) = Q(f).
7
Flip-Flops (Cont.)
JK Flip-Flop:
A JK flip-flop is a refinement of the SR flip-flop in that the indeterminate
condition of the SR type is defined in the JK type.
Inputs J and K behave like inputs S and R to set and clear the flip-flop,
respectively.
When inputs / and K are both equal to 1, a clock transition switches the
outputs of the flip-flop to their complement state.
The graphic symbol and characteristic table of the JK flip-flop:
8
Flip-Flops (Cont.)
T Flip-Flop:
T (toggle) flip-flop is obtained from a JK type when inputs J and K are
connected to provide a single input designated by T.
The T flip-flop therefore has only two conditions.
When T = 0(J = K = 0)a clock transition does not change the state of the flipflop.
When T = 1(J = K = 1)a clock transition complements the state of the flip-flop.
These conditions can be expressed by a characteristic equation:
Q(t + 1) = Q(t) T
9
Flip-Flops (Cont.)
Edge-Triggered Flip-Flops :
The most common type of flip-flop used to synchronize the state
change during a clock pulse transition is the edge-triggered flipflop.
In this type of flip-flop, output transitions occur at a specific level
of the clock pulse.
When the pulse input level exceeds this threshold level, the inputs are
locked out so that the flip-flop is unresponsive to further changes in
inputs until the clock pulse returns to 0 and another pulse occurs.
Some edge-triggered flip-flops cause a transition on the rising
edge of the clock signal (positive-edge transition), and others
cause a transition on the falling edge (negative-edge transition).
10
Flip-Flops (Cont.)
11
Flip-Flops (Cont.)
Excitation Tables:
The characteristic tables of flip-flops specify the next state when the inputs and
the present state are known.
During the design of sequential circuits we usually know the required transition
from present state to next state and wish to find the flip-flop input conditions
that will cause the required transition.
For this reason we need a table that lists the required input combinations for a
given change of state. Such a table is called a flip-flop excitation table.
Each table consists of two columns, Q(t) and Q(t + 1), and a column for each
input to show how the required transition is achieved.
There are four possible transitions from present state Q(t) to next state Q(t +
1).
The required input conditions for each of these transitions are derived from the
information available in the characteristic tables.
The symbol x in the tables a represents don't-care condition; that is, it does not
matter whether the input to the flip-flop is 0 or 1.
12
Flip-Flops (Cont.)
13
Sequential Circuits
A sequential circuit is an interconnection of flip-flops and gates.
The gates by themselves constitute a combinational circuit, but when
included with the flip-flops, the overall circuit is classified as a
sequential circuit.
The block diagram of a clocked sequential circuit is:
It consists of a combinational circuit and a number of
clocked flip-flops.
14
Sequential Circuits (Cont.)
As shown in the diagram, the combinational circuit block receives
binary signals from external inputs and from the outputs of flip-flops.
The outputs of the combinational circuit go to external outputs and to
inputs of flip-flops.
The gates in the combinational circuit determine the binary value to
be stored in the flip-flops after each clock transition.
The outputs of flip-flops, in turn, are applied to the combinational
circuit inputs and determine the circuit's behavior.
This process demonstrates that the external outputs of a sequential
circuit are functions of both external inputs and the present state of
the flip-flops.
Moreover, the next state of flip-flops is also a function of their present
state and external inputs.
Thus a sequential circuit is specified by a time sequence of external
inputs, external outputs, and internal flip-flop binary states.
15
Sequential Circuits (Cont.)
Flip-Flop Input Equations (Analyze):
An example of a sequential circuit is:
16
Sequential Circuits (Cont.)
The interconnections among the gates in the combinational
circuit can be specified by a set of Boolean expressions.
The part of the combinational circuit that generates the inputs
to flip-flops are described by a set of Boolean expressions
called flip-flop input equations
We adopt the convention of using the flip-flop input symbol to
denote the input equation variable name and a subscript to
designate the symbol chosen for the output of the flip-flop.
Thus, we have two input equations, designated DA and DB.
The first letter in each symbol denotes the D input of a D flip-flop. The
subscript letter is the symbol name of the flip-flop.
17
Sequential Circuits (Cont.)
Since the output of the OR gate is connected to the D input of
flip-flop A, we write the first input equation as
DA= Ax + Bx
The second input equation is derived from the single AND gate
whose output is connected to the D input of flip-flop B:
DB = A'x
The sequential circuit also has an external output, which is a
function of the input variable and the state of the flip-flops. This
output can be specified algebraically by the expression
y = Ax' + Bx'
18
Sequential Circuits (Cont.)
State Table:
The behavior of a sequential circuit is determined from the
inputs, the outputs, and the state of its flip-flops.
Both the outputs and the next state are a function of the
inputs and the present state.
A sequential circuit is specified by a state table that relates
outputs and next states as a function of inputs and present
states.
The state table for the previous circuit is:
19
Sequential Circuits (Cont.)
20
Sequential Circuits (Cont.)
In general, a sequential circuit with m flip-flops, n input
variables, and p output variables will contain:
m columns for present state,
n columns for inputs,
m columns for next state,
and p columns for outputs.
The present state and input columns are combined and
under them we list the 2m +n binary combinations from 0
through 2m + n - 1.
The next-state and output columns are functions of the
present state and input values and are derived directly
from the circuit or the Boolean equations that describe the
circuit.
21
Sequential Circuits (Cont.)
State Diagram:
The information available in a state table can be
represented graphically in a state diagram.
In this type of diagram, a state is represented by a circle,
and the transition between states is indicated by directed
lines connecting the circles.
The state diagram of the pervious sequential circuit is:
22
Sequential Circuits (Cont.)
23
Sequential Circuits (Cont.)
Design Example:
The design procedure consists of:
First translating the circuit specifications into a state diagram.
The state diagram is then converted into a state table.
From the state table we obtain the information for obtaining the logic
circuit diagram.
We wish to design a clocked sequential circuit that goes through
a sequence of repeated binary states 00, 01, 10, and 11 when
an external input x is equal to 1. The state of the circuit remains
unchanged when x = 0.
This type of circuit is called a 2-bit binary counter because the
state sequence is identical to the count sequence of two binary
digits.
Input x is the control variable that specifies when the count
should proceed.
24
Sequential Circuits (Cont.)
The binary counter needs two flip-flops to represent the
two bits. The state diagram for the sequential circuit is:
25
Sequential Circuits (Cont.)
The diagram is drawn to show that the states of the circuit
follow the binary count as long as x = 1. The state following 11
is 00, which causes the count to be repeated. If x = 0, the state
of the circuit remains unchanged.
This sequential circuit has no external outputs, and therefore
only the input value is labeled in the diagram.
The state of the flip-flops is considered as the outputs of the
counter.
We have already assigned the symbol x to the input variable.
We now assign the symbols A and B to the two flip-flop outputs.
The next state of A and B, as a function of the present state
and input x, can be transferred from the state diagram into a
state table.
26
Sequential Circuits (Cont.)
The excitation table of a sequential circuit is an extension
of the state table.
This extension consists of a list of flip-flop input
excitations that will cause the required state transitions.
The flip-flop input conditions are a function of the type of
flip-flop used.
If we employ JK flip-flops, we need columns for the J and
K inputs of each flip-flop.
We denote the inputs of flip-flop A by JA and KA, and those
of flip-flop B by JB and KB.
27
Sequential Circuits (Cont.)
28
Sequential Circuits (Cont.)
The simplified Boolean functions for the combinational circuit can now be
derived.
The inputs are the variables A, B, and x. The outputs are the variables JA/
KA/ JB/ and KB.
29
Sequential Circuits (Cont.)
The logic diagram of a 2-bit binary counter:
30