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25 Pages

### L13.Counters-1pp

Course: ECE 2300, Fall 2011
School: Cornell
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Word Count: 520

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2300 Digital ECE Logic and Computer Organization Counters, Shift Registers Outline Counters Shift registers Self-correcting counters Reading: Chapter 5.4 ENGRD 2300 L13 Counters and Shift Registers 2 Counter Sequential circuit whose state diagram is a single cycle EN EN RESET EN EN EN EN EN EN EN EN EN EN ENGRD 2300 EN L13 Counters and Shift Registers 3 Types of Counters Binary...

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2300 Digital ECE Logic and Computer Organization Counters, Shift Registers Outline Counters Shift registers Self-correcting counters Reading: Chapter 5.4 ENGRD 2300 L13 Counters and Shift Registers 2 Counter Sequential circuit whose state diagram is a single cycle EN EN RESET EN EN EN EN EN EN EN EN EN EN ENGRD 2300 EN L13 Counters and Shift Registers 3 Types of Counters Binary counters Decade counters 0 to 9 Ring counters 0001, 0010, 0100, 1000, 0001, ... Only one 1 at a time Johnson counters 0000, 0001, 0011, 0111, 1111, 1110, 1100, 1000, 0000, ... ENGRD 2300 L13 Counters and Shift Registers 4 T Flip-Flops Toggle flip-flop Changes state each time T pulses Useful for counters T ENGRD 2300 Q Q D T Q Q CLK Q L13 Counters and Shift Registers 5 Basic T FF Binary Counter EN CLK EN T T T Q Q0 Q0 = 010101 Q Q Q1 Q1 = 001100 Q Q Q Q2 Q2 = 000011 For an n bit counter, the time to change the most significant bit is ________ ENGRD 2300 L13 Counters and Shift Registers 6 Synchronous Serial Counter EN CLK EN Q Q0 Q Q1 Q Q2 T EN T EN T Propagation delay is now ________ ENGRD 2300 L13 Counters and Shift Registers 7 Synchronous Parallel Counter EN CLK EN Q Q0 Q Q1 Q Q2 T EN T EN T ENGRD 2300 L13 Counters and Shift Registers 8 4-Bit Binary MSI Counter (163) Inputs CLK = clock input CLR = clear outputs (synchronous) ENT AND ENP = enable counting LD = load A,B,C,D A-D = number to load Outputs QA-QD = current number in sequence RCO = ripple carry out = 1 if QA-QD = 1111, and ENT is 1 ENGRD 2300 L13 Counters and Shift Registers 9 Free-Running Counter Always enabled Increments every rising clock edge Modulo 16 or divideby-16 counter ENGRD 2300 L13 Counters and Shift Registers 10 Free-Running Counter Timing Diagram ENGRD 2300 L13 Counters and Shift Registers 11 Divide by 11 Counter Count sequence 0000 0001 1001 1010 0000 To divide by 11 (1011), assert clear at 10 (1010) ENGRD 2300 L13 Counters and Shift Registers 12 5-to-15 Counter Count sequence 0101 0110 1110 1111 0101 Load 5 (0101) when count reaches 15 (1111) ENGRD 2300 L13 Counters and Shift Registers 13 3-to-12 Counter Count sequence 0011 0100 1011 1100 0011 Load 3 (0011) when count reaches 12 (1100) ENGRD 2300 L13 Counters and Shift Registers 14 Cascading Binary Counters Use RCO from low-order counter to increment high-order counter Example: 8 bit counter ENGRD 2300 L13 Counters and Shift Registers 15 Shift Registers Applications Serial data transmission Computer arithmetic Delaying a signal Serial-in, serial-out SERIN appears on SEROUT after n clock ticks ENGRD 2300 L13 Counters and Shift Registers 16 Serial-In, Parallel-Out Shift Register Shift register with all bits available after n clock ticks Serial to parallel conversion ENGRD 2300 L13 Counters and Shift Registers 17 Parallel-In, Serial-Out Shift Register ENGRD 2300 L13 Counters and Shift Registers 18 Serial/Parallel In/Out ENGRD 2300 L13 Counters and Shift Registers 19 MSI Shift Registers ENGRD 2300 L13 Counters and Shift Registers 20 Ring Counter Shift-register counter Single 1 shifts through the outputs ENGRD 2300 L13 Counters and Shift Registers 21 4-bit Ring Counter Load 0001 when RESET asserted Then shift left and wrap around 0001 0010 0100 1000 0001 Wraparound: Tie QA to LIN ENGRD 2300 L13 Counters and Shift Registers 22 Not Self-Correcting If noise causes an invalid state cycle through an invalid sequence forever ENGRD 2300 L13 Counters and Shift Registers 23 Self-Correcting 4-bit Ring Counter Force all invalid states to lead to the valid sequence Shift left a 1 into LIN only if three LSBs are all 0 ENGRD 2300 L13 Counters and Shift Registers 24 Self-Correcting 4-bit Ring Counter ENGRD 2300 L13 Counters and Shift Registers 25
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