che575_05
N.C. State, CHE 575
Excerpt: ... Electronic Processing (Macro, Micro, and Nano) Intro. to Printed Circuit Board Processing Recycling Lecture 5A Christine S. Grant, Ph.D. Professor of Chemical and Biomolecular Engineering North Carolina State University College of Engineering Raleigh, North Carolina, USA Materials for Slides (15, 20-29) from U. of Illinois Case Study notes PPT Macro Micro Nano www.apple.com Considerable interest has been shown in the production of structures on a molecular level by suitable sequences of chemical reactions or lithographic techniques. It is also possible to manipulate individual atoms on surfaces using a variant of the atomic force microscope. http:/www.stillwaterpalladium.com/research/nanotechnology.html Electronic Assembly IC and capacitor die attach in ceramic chip carrier. Photomicrograph of flip chip die on liquid crystal polymer (LCP) printed circuit board material for 80 Gbps circuit demonstration. http:/www.mayo.edu/sppdg/Electronic_Test/ElectronicAssemb ly.html 6 mm standard mult ...
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17s_schematic
St. Mary MD, ELMER 101
Excerpt: ... Asterisked components are additions, with no provision on the printed circuit board . These components must be added with flying leads. In some cases, surface mount components were used. Some printed circuit traces must be cut there are no notes on this schematic showing mods to these traces. ...
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P2 in Electronics
UCSB, ESM 595
Excerpt: ... ESM 595 F Pollution Prevention in the Electronics Industry 1 Electronics Industry Fast growing sector of economy Few common appliances and machines could function without electronics Perceived as "pollutionfree" since it has no smoke stacks Environmental impacts . 2 Semiconductor Manufacture Crystal Growth Wafer fabrication Deposit of active and inactive layers Oxidation to form silicon oxide Photolithography Etching Addition of impurities for special functions 3 Crystal Growth 4 Silicon Wafer 5 6 Printed Circuit Board Patterns of Conductive Material set on a Nonconductive base Conductive Materials: Cu, Al, Cr, Ni Nonconductive: Epoxy/paper, phenolic resin, epoxy/glass resin, teflon Conductor can be added as lines or as a layer which is then etched 7 Printed Circuit Board Clean and prepare surface (drilling, burring, solvent wash, abrasive wash, alkaline wash) Electroless copper plating (thin layer through holes) Pattern printing and masking Electroplating Etchin ...
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LabDicingAndPackaging
Johns Hopkins, ECE 495
Excerpt: ... 520.495/580.495 Microfabrication Laboratory Laboratory Assignment Wafer Scribing, Dicing and Packaging Objectives: I) To scribe the wafer and harvest the fabricated chips. II) To mount the chips on printed circuit board s to facilitate testing and characterization. Preliminaries: 1. When scribing the wafers be extra careful and gentle. 2. Use tweezers to handle the dice; dispose propertly the extra silicon pieces in the "sharps" container. I. Prelab Work: None II. Lab Work: The final step in the lab process is the packaging of the dice. Our package is simple; a printed circuit board with copper wire patterns etched on it. The wafers will be scribed manually by dragging a diamond tipped tool across the wafer to score the surface. Subsequently, the individual microchips will be separated from the wafer, and mounted on the printed circuit board using epoxy. The wire bonder will be used to make connections from the bonding pads on the die to the leads of the package. A. Scribing the wafer 1. Place your wafer on a ...
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brunno_moretti_appnote
Michigan State University, ECE 480
Excerpt: ... How to layout a Printed Circuit Board using Eagle Layout Software Brunno Moretti 03/30/07 This application note describes how to layout a printed circuit by using the software Eagle Layout. From building the schematics to passing it on to a finished printed board, this application note will cover all steps in between. With Eagle Layout the user will start with designing the schematics of a certain system and for best results, the software has the flexibility to create your own library. After having the schematic ready the software will let user reflect the design onto a PC board so it can be routed accordingly and sent out to be printed. Introduction Printed circuit board s have the function of physically supporting electrical components and also connect them electrically by using generally cooper laminated pathways. Almost all electronic devices today need to have boards printed in order to meet size and cost requirements. This application note will go in detail and use examples to illus ...
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ECGR2181-Lecture01
UNC Charlotte, ECGR 2181
Excerpt: ... packages have metal leads that are the conductive wire that connect electricity from the outside world to the silicon inside the package. Leads between packages are connected with small copper traces on a printed circuit board (PCB), and the package leads are soldered to the PCB. Logic System Design I 1-11 Examples of Electronics Packages Dual In-line Package (DIP) Older technology, requires the metal leads to go through a hole in the printed circuit board . Dual Flat Pack (DFP) - A fairly recent technology, metal leads solder to the surface of the printed circuit board . Logic System Design I 1-12 Examples of Electronics Packages Quad Flat Pack (QFP) - like the Dual Flat Pack, except here are metal leads are on four sides. Ball Grid Array (BGA) - The connections to the component are on the bottom of the chip, and have balls of solder on these connections. Logic System Design I 1-13 Using these Components Logic System Design I 1-14 The End Products Logic System Design I 1-15 Before Ne ...
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Lab8WG_Dicing
Johns Hopkins, ECE 495
Excerpt: ... 520.495/530.495/580.495 Microfabrication Laboratory Optical Waveguides Lab 8: Wafer Dicing and Packaging This week we will finish the fabrication of the project by harvesting individual smaller dice that incorporate the optical waveguides. In doing so, we facilitate the possibility that we may want to package our devices and or we avoid the risk damaging the whole wafer while testing the individual parts. The wafers will be scribed manually by dragging a diamond tipped tool across the wafer to score the surface. Subsequently, the individual microchips will be separated from the wafer. These will be mounted on the printed circuit board or a commercial package using epoxy (optional). The wire bonder will be used to make connections from the bonding pads on the die to the leads of the package (optional). Preliminaries: 1. When scribing the wafers be extra careful and gentle. 2. Use tweezers to handle the dice; dispose properly the extra silicon pieces in the "sharps" container. I. PRELAB ASSIGNMENT: 1. What are ...
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Lab8WG_Dicing
Johns Hopkins, ECE 495
Excerpt: ... 520.495/530.495/580.495 Microfabrication Laboratory Optical Waveguides Lab 8: Wafer Dicing and Packaging This week we will finish the fabrication of the project by harversting individual smaller dice that incorporate the optical waveguides. In doing so, we facilitate the possibility that we may want to package our devices and or we avoid the risk damaging the whole wafer while testing the individual parts. The wafers will be scribed manually by dragging a diamond tipped tool across the wafer to score the surface. Subsequently, the individual microchips will be separated from the wafer. These will be mounted on the printed circuit board or a commercial package using epoxy (optional). The wire bonder will be used to make connections from the bonding pads on the die to the leads of the package (optional). Preliminaries: 1. When scribing the wafers be extra careful and gentle. 2. Use tweezers to handle the dice; dispose propertly the extra silicon pieces in the "sharps" container. I. PRELAB ASSIGNMENT: None II. L ...
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5
UConn, TEAM 9
Excerpt: ... Front of Handheld Console Back of Handheld Console Printed Circuit Board for Handheld Console The Accessible Weight Scale for Seated Users ...
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ETraveler
Vanderbilt, HEP 000955
Excerpt: ... Print Form Submit by Email Board Serial Number LIGO E-TRAVELER E-Traveler DCC Number & Revision Schematic DCC Number & Revision Board Title PCB Revision Cognizant Design Engineer (COG) E-Traveler Originator & Institution Date Printed Circuit Board Fabrication Notes Upon receipt of printed circuit board , note discrepancies and any required repair. Examples include fixing silkscreen, through-hole size correction etc. Performed By: Date Board Modifications made during initial manufacture to conform with existing DCNs. Cite applicable DCN numbers. Performed By: Date Acceptance Testing Test Procedure DCC Number & Revision Performed By: Date List any discrepancies or deviations from limits established in the test procedure LIGO Electronics Traveler Form E010180-A Page 1 of 1 LIGO E-TRAVELER E-Traveler DCC Number & Revision Schematic DCC Number & Revision Board Title Board Serial Number ...
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elec477hw2_sp08
Bucknell, ELEC 477
Excerpt: ... ELEC 477 Topics in Wireless System Design (Indep. Study) Homework Assignment #2 due Friday, Feb. 8, 2008 Spring 2008 1. Find the insertion loss and transducer loss for the network between terminals a-b and c-d in the circuit shown below. The circuit operates at a frequency of 100 MHz. Assume that all of the components except the inductor are ideal. (The resistance Rs represents the wire loss in the inductor.) Rg = 50 Vg 10 @ 0 mV rms + b a Rs = 3 L = 31.8 nH C 63.7 pF c RL = 10 d 2. Derive the design equations given in the Lab #1 handout for the pi network attenuator. Leave the system impedance (represented by RL in the handout, but you could use Zo) as a variable. Find the skin depth of copper at 1070 kHz, 90.5 MHz, and 2.45 GHz. Compare your results to the thickness of the copper cladding on a typical printed circuit board (approx. 0.0017 in.); that is, how many skin depths thick is the cladding at each frequency? Design an L network to match a 25- source impedance to a loa ...
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Lab2
Case Western, EECS 245
Excerpt: ... EECS 245 Electronic Circuits Lab 2, Half-Wave Rectiers Objective To study the characteristics and operation of half-wave rectier and lter circuits. Reading Graymark Manual pages 22 36 Note that the convention for the direction of current ow is different in the Graymark Manual than is used in this course. In the Graymark Manual, current ows in the same direction as electrons ow. For this course, the convention is that current ows out of the positive terminal of a voltage or current source. Procedure 1. CONSTRUCTION Perform Steps 1 3 on page 23 of the Graymark manual. Pay careful attention to Figure 40 on how to solder diodes to a printed circuit board . As shown in Figure 40, using an alligator clip as a heat sink to protect the diode is an excellent idea. 2. DIODE Perform Steps 1 4, DIODE EXPERIENCE, on page 24. Remember to record the forward and reverse resistance readings. HINT: Check ALL diodes for different forward and reverse readings before you solder them to your ...
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CCO EDDT 2180
Salt Lake Community College, EDDT 2180
Excerpt: ... Curriculum Outline Date of Adoption: April 20, 2003 Course Abbreviation and Number: Course Title: Electronics Drafting Course Description: Drafting and design techniques used in the electronics industry including: electronics symbols, schematic and logic diagrams, electro-mechanical design, printed circuit board design, artwork layout, and related industry standards. Course Prerequisites: EDDT1200 Number of credits: 3 Number of instructional contact hours: 5 Number of lecture hours per week: 2 week: 3 Type of credit: Vocational Submitted by: Sherwood Davis Course Objectives: 1. The student will create electrical schematic diagrams that meet current industry standards. 2. The student will learn correct procedure to create layouts for single and double sided printed circuit board s. 3. The student will create the drawings associated with printed circuit assemblies. 4. The student will create design layouts for electro-mechanical assemblies. 5. The student will create the required drawings for electro-mechanical ...
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Lecture_Set_8
Sveriges lantbruksuniversitet, ENSC 460
Excerpt: ... A mechanism within an integrated circuit that verifies part or all of an IC Included as addition circuitry Reduces reliance on automated test equipment (ATE) Design for Testability (DFT) Techniques that adds certain testability features to hardware Examples include: 2. Scan Chains (boundary scan) A method of observing every flipflop in a system When scan_enable = 1, all of the flipflops are connected as one long shift register. One input accepts data for the chip, one output pin displays output The standard for industry is JTAG (Joint Test Action Group) ENSC 460/894: Lecture Set 8 19 ENSC 460/894: Lecture Set 8 20 Verification JTAG Has a fixed interface Designed so that multiple chips can be daisy chained together Used for testing on printed circuit board s You program the FPGA this way Well defined Test Cases should be part of the initial specification (may even include test vectors) Testboards: A printed circuit board that enables designers to use logic analy ...
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pcb01
Stanford, EE 414
Excerpt: ... Printed Circuit Board Description Note 2. Crystal To VCO Implement whatever interface circuit you need in this area. bypass 2 1 1 C C R MC12181 C Rx Ro bypass Note 1. C Cx CA Co 1000pF 8-pin DIP 1000pF GND Note 1. I made a mistake in the layout here. These 4 pins of DIP switch should never be connected to ground, so do not push pins through the holes. Note 2. This part as laid out is for the circuit that does not contain modulator. If you are planning to implement a modulator by modulating the reference, you can use this part: add modulating voltage through the BNC connector and add a varactor or a BJT (as a varactor). ...
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4
UConn, TEAM 9
Excerpt: ... Finished Elevated Toilet Compartment with All Components Installed Side View of Elevated Toilet Compartment and Foot Supports Printed Circuit Board for Elevated Toilet Compartment Inside of Finished Elevated Toilet Compartment ...
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powersupply
UNF, EEL 4516
Excerpt: ... Computer Architecture Lab 1: Building your MicroOsprey Power Supply Schematic for the power supply. Printed Circuit Board (PCB) Layout for the power supply. ...
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chem628_project_requirements
Wisconsin, CHEM 628
Excerpt: ... Chem 628 projects: Due dates: November 21: All students: turn in short description of your project, along with a schematic of what you intend to build November 23 lecture: Students with last name beginning with A-L, give <5-minute presentation on your project November 28th lecture: Students with last name M-Z, give <5 minute presentation on your project December 16 (or preferably before): All projects due. All projects must be easily testable, meaning that all inputs and outputs need to be labeled, power supply inputs must be made easily accessible, etc. Each project must be accompanied by a a short writeup describing its function, a nicely-drawn schematic, a hard-copy of the printed circuit-board layout, and if possible, some test results showing that it works. Minimum requirements: Unless I have told you specifically otherwise, all projects must have a minimum of 2 integrated circuits. All projects must be made on a printed circuit board and must be completely enclosed in an appropriate metal or plast ...
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Schematics
Kentucky, JHOLL 2
Excerpt: ... SCHEMATICS, COMPONENTS, AND S OLDERING You learned the basic idea behind a schematic drawing in an earlier chapter. A schematic is a not-to-scale drawing of how a circuit is connected together, but it does not show any of the physical arrangement of the component parts. Schematics show electrical relationships, not physical ones, so parts that are right together on a printed circuit board may be shown far apart from one another, or things close together may be shown on opposite sides of the plan. Earlier on when studying Ohm's law, you were presented with schematics like this one, which were used to determine the relationship between current, resistance, power, and voltage. This type of drawing is really only meant for circuit analysis. The rectangle near the center represents an integrated circuit chip known as an "opamp" or operational amplifier. It is being used as a central control agent for this dimmer. Looking to the top of the drawing you can see that the input voltage is +12 volts higher than the gro ...
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Progress13
Wisconsin, BME 301
Excerpt: ... Title: EMG Biofeedback Device Names: TEAM: Brent Geiger Team leader Jason Ethington Communicator Tom Chia BSAC Tim Rand BWIG Kim Treml BSAC CLIENT: Arleigh Birchler, MDiv, BSN Bram's Addition Life&Choice http:/www.abirchler16.org/index.html Phone: 251-4437 email: wisclifechoice@hotmail.com ADVISOR: John G. Webster 2148 Engineering Centers Building 1550 Engineering Drive Madison, WI 53706-1609 Tel: 608/263-1574 Fax: 608/265-9239 webster@engr.wisc.edu Date: 11-25-2003 12-2-2003 Progress Report #13 Problem Statement: The goal of this project is to design a closed loop EMG biofeedback device to allow a small child with Lissencephaly to exhibit some physical control over his life. Restatement of Team Goals: Order PCB board. Assemble/solder all components on onto circuit board. Begin work on poster presentation and final paper. Individual Goals: Brent Geiger: When printed circuit board arrives, begin soldering and final assembly. Work on poster presentation slides and final paper (5). T ...
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lecture_10_notes
Rose-Hulman, ECE 341
Excerpt: ... plane dielectric boundary is encountered? Consider the situation below: Define a transmission coefficient, T, and reflection coefficient, . T= Let Ei = a xEi e -j1z Et Ei = Er Ei Boundary conditions: E1tan z=0 = E2tan z=0 H1tan z=0 = H2tan z=0 lecture 10 notes 4 Example 4: transmission and reflection Find the reflection and transmission coefficients for a wave traveling in a printed circuit board made from FR-4 (most common PCB material fiberglass epoxy base) into air. FR-4 air r=4.4, r=1, r=1 r=1 lecture 10 notes ...
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ee461_lecture_29
Montana, EE 461
Excerpt: ... of these noise sources must be analyzed in the noise budget. EE 461 Digital System Design Spring 2008 Lecture #29 Page 2 Exam #2 Review Exam #2 - Monday, 4/7/08 - open books, open notes - no laptops or cell phones - Topics: 1) Application of SI principles to PCBs - Cross Talk - Impedance Discontinuities - Signal risetime degradation - SSN 2) Printed Circuit Board Process 3) PCB CAD EE 461 Digital System Design Spring 2008 Lecture #29 Page 3 ...
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ee461_lecture_29
Montana, EE 461
Excerpt: ... these noise sources must be analyzed in the noise budget. EE 461 Digital System Design Spring 2008 Lecture #29 Page 2 1 Exam #2 Review Exam #2 - Monday, 4/7/08 - open books, open notes - no laptops or cell phones - Topics: 1) Application of SI principles to PCBs - Cross Talk - Impedance Discontinuities - Signal risetime degradation - SSN 2) Printed Circuit Board Process 3) PCB CAD EE 461 Digital System Design Spring 2008 Lecture #29 Page 3 2 ...
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01overview
Washington, CS 417
Excerpt: ... hem "accomplish" via simple, well-defined steps Ex: sorting names (via comparison) Ex: checking for primality (via +, -, *, /, ) 13 Algorithms: a sample problem Printed circuit-board company has a robot arm that solders components to the board Time: proportional to total distance the arm must move from initial rest position around the board and back to the initial position For each board design, find best order to do the soldering 14 Printed Circuit Board 15 Printed Circuit Board 16 A Well-defined Problem Input: Given a set S of n points in the plane Output: The shortest cycle tour that visits each point in the set S. Better known as "TSP" How might you solve it? 17 Nearest Neighbor Heuristic Start at some point p0 Walk first to its nearest neighbor p1 Repeatedly walk to the nearest unvisited neighbor p2, then p3,. until all points have been visited Then walk back to p0 heuristic: A rule of thumb, simplification, or educated guess that reduces or limits the sea ...
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EE101.FL02.Lab09
Montana, EE 101
Excerpt: ... EE101 Laboratory 9 Section_ (FL 02) Date_ Name_ Instructional Objectives (at the end of this lab you should be able to:) I1. Solder some components of the sound-activated circuit onto the small printed circuit board in your lab kit. I2. Follow a wiring diagram and printed circuit board markings to properly construct the circuit containing two operational amplifiers used in the previous lab. I2. Use a voltage divider circuit to provide the input signal to the soldered circuit. I3. Measure circuit signals and follow the signal through the circuit by displaying signals on the oscilloscope to verify solder joints and circuit operation. Description and background In the next two labs you will be assembling the sound-activated project kit. By the end of Lab 10, each of you is expected to demonstrate your circuit is functioning properly. Because quality assembly and soldering of the circuit is essential for proper operation of the circuit, you may need to spend time out ...
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