Online study resources available anywhere, at any time
High-quality Study Documents, expert Tutors and Flashcards
Everything you need to learn more effectively and succeed
We are not endorsed by this school |
We are sorry, there are no listings for the current search parameters.
School: Auburn
Course: Digital Logic Circuits
ELEC 2200-003 Digital Logic Circuits Fall 2011 Homework 3 Solution Assigned 9/12/11, due 9/19/11 Problem 1: For 3-bit 2s complement binary integers, construct 4-bit even and odd parity codes by adding a parity bit in the most significant bit position. Ans
School: Auburn
Course: Computer Architecture And Design
ELEC 5200-001/6200-001 Computer Architecture and Design Spring 2012 Homework 9 Solution Assigned 4/9/12, due 4/18/12 Problem 1: Run times for three programs are recorded on two processors: Program A B C D Run time (seconds) Processor X Processor Y 1 20 20
School: Auburn
1. Create a zone file for a domain, wareagle.com. This zone contains a. DNS servers: ns1.wareagle.com, ns2.wareagle.com, ns3.wareagle.com b. A web server: www.wareagle.com or wareagle.com c. An email server: mail.wareagle.com d. A FTP server: ftp.ns.warea
School: Auburn
Course: Digital Logic Circuits
ELEC 2200-003 Digital Logic Circuits Fall 2011 Homework 6 Solution Assigned 10/17/11, due 10/24/10 Problem 1: A house alarm system is designed to sense several conditions represented by binary (0,1) Boolean variables, A, F, M, and W, defined as: A F M W =
School: Auburn
Course: Computer Architecture And Design
ELEC 5200/ELEC 6200 Computer Architecture and Design Class Test 1, October 6, 2010 Broun 306, 11:00-11:50AM Total 25 points Instructions: Please read all problems before writing your answers. Attempt all six (6) problems. Be sure to revise your answers be
School: Auburn
Course: Digital Logic Circuits
ELEC 2200-003 Digital Logic Circuits Class Test II, October 12, 2011 Broun 113, 2:00PM-2:50PM Total 20 points Instructions: Please read all problems before writing your answers. Attempt all five (5) problems. Be sure to revise your answers before turning
School: Auburn
Course: Special Topics In Electrical Engineering Frequency Synth Ic Dsn
Vector Generation using Spectral Methods Ayoush M Dixit Electrical and Computer Engineering Department Auburn University, Auburn, AL-36849 Email: dixitam@auburn.edu Abstract Two new test generation algorithms for combinational and sequential circuits have
School: Auburn
Course: Power Electronics
ELEC 5610/6610 Power Electronics Lecture #3 Periodic function f(t) = f(t+nT0) T0 period 15 Output Voltage (V) 10 T0 5 0 0 0.01 0.02 0.03 -5 -10 -15 Time (s) 0.04 0.05 Average value Favg Favg 1 T0 T0 f (t )dt o RMS value Frms Frms 1 T0 T0 o f 2 (t )dt Four
School: Auburn
Course: Power Electronics
ELEC 5610/6610 Power Electronics Lecture #12 Isolated DC-DC Converters Basic Transformer i1 + v1 - i2 N1 N2 + v2 - Magnetic Equivalent Circuit Rc = lc/ Ac N N N2i2 N1i1 S S Ideal Transformer Assumptions For the windings, Electric fields produced by the
School: Auburn
Course: Power Electronics
ELEC 5610/6610 Power Electronics Lecture #8 DC-DC Converters 4 Boost Converter iin = iL L + vL + vD - - + vT Vin iT iD C - iC + v0 - R With the switch closed: iin = iL L + vL - + C Vin v0 R - With the switch open: iin = iL L + vL Vin - + C v0 - R When iL
School: Auburn
Course: Power Electronics
ELEC 5610/6610 Power Electronics Lecture #6 DC-DC Converter 2 Switching Power Pole Buck Converter in A 0 Boost Converter With the switch closed: in L L in With the switch open: 0 L L in L L on in 0 s L max L min on s C on 0 s iL Ton Ts t Ts t iD Ton iL To
School: Auburn
Course: Power Electronics
ELEC 5610/6610 Power Electronics Lecture #4 DC-DC Converters 1 DC-DC Converters DC Source: Rectifier or Battery DC-DC Converter Load Objective: Maintain a desired DC voltage at the load with variations in the load and the input voltage Applications: Compu
School: Auburn
Course: Power Electronics
ELEC 5610/6610 Power Electronics Lecture #17 Rectifiers #4 Controlled Rectifiers + + vT - + v0(t) vs(t) - - R 200 Source and Load Voltage (V) 150 Load Voltage 100 50 0 -50 45 Source Voltage -100 -150 -200 Angle (degrees) 360 150 100 Thyristor Voltage (V)
School: Auburn
Course: Computer Architecture And Design
ELEC 5200/ELEC 6200 Computer Architecture and Design Class Test 1, October 6, 2010 Broun 306, 11:00-11:50AM Total 25 points Instructions: Please read all problems before writing your answers. Attempt all six (6) problems. Be sure to revise your answers be
School: Auburn
Course: Digital Logic Circuits
ELEC 2200-003 Digital Logic Circuits Class Test II, October 12, 2011 Broun 113, 2:00PM-2:50PM Total 20 points Instructions: Please read all problems before writing your answers. Attempt all five (5) problems. Be sure to revise your answers before turning
School: Auburn
Course: Computer Architecture And Design
ELEC 5200/ELEC 6200 Computer Architecture and Design Class Test 1, February 10, 2012 Broun 306, 11:00-11:50AM Total 25 points Instructions: Please read all problems before writing your answers. Attempt all six (6) problems. Be sure to revise your answers
School: Auburn
Course: Computer Architecture And Design
ELEC 5200/ELEC 6200 Computer Architecture and Design Class Test 2, April 11, 2012 Broun 306, 11:00-11:50AM Total 25 points Instructions: Please read all problems before writing your answers. Attempt all six (6) problems. Be sure to revise your answers bef
School: Auburn
Course: Computer Architecture And Design
ELEC 5200/ELEC 6200 Computer Architecture and Design Class Test 1, February 10, 2012 Broun 306, 11:00-11:50AM Total 25 points Instructions: Please read all problems before writing your answers. Attempt all six (6) problems. Be sure to revise your answers
School: Auburn
Course: Computer Architecture And Design
ELEC 5200/ELEC 6200 Computer Architecture and Design Final Exam, May 4, 2012 Broun 306, 12:00PM2:30PM Total 25 points Instructions: Read all questions before writing your answers and attempt all six (6) questions. Be sure to revise your answers before tur
School: Auburn
Course: Digital Logic Circuits
ELEC 2200-003 Digital Logic Circuits Fall 2011 Homework 3 Solution Assigned 9/12/11, due 9/19/11 Problem 1: For 3-bit 2s complement binary integers, construct 4-bit even and odd parity codes by adding a parity bit in the most significant bit position. Ans
School: Auburn
Course: Computer Architecture And Design
ELEC 5200-001/6200-001 Computer Architecture and Design Spring 2012 Homework 9 Solution Assigned 4/9/12, due 4/18/12 Problem 1: Run times for three programs are recorded on two processors: Program A B C D Run time (seconds) Processor X Processor Y 1 20 20
School: Auburn
1. Create a zone file for a domain, wareagle.com. This zone contains a. DNS servers: ns1.wareagle.com, ns2.wareagle.com, ns3.wareagle.com b. A web server: www.wareagle.com or wareagle.com c. An email server: mail.wareagle.com d. A FTP server: ftp.ns.warea
School: Auburn
Course: Digital Logic Circuits
ELEC 2200-003 Digital Logic Circuits Fall 2011 Homework 6 Solution Assigned 10/17/11, due 10/24/10 Problem 1: A house alarm system is designed to sense several conditions represented by binary (0,1) Boolean variables, A, F, M, and W, defined as: A F M W =
School: Auburn
Course: Neural Networks
Matlab Code: format compact; clear clf; clc; in=[-1 1 1.5 1.7 1.9 -1.8 -0.7 -0.3 1 0.5 -1 -1] [r,c] = size(in); plot(in(:,1), in(:,2),'+r'); hold on in_normalize(:,1) = in(:,1)./sqrt(in(:,1).^2 + in(:,2).^2); in_normalize(:,2) = in(:,2)./sqrt(in(:,1).^2 +
School: Auburn
Course: Computer Architecture And Design
ELEC 5200-001/6200-001 (Spring 2012) Homework 10 Solution Assigned 4/18/12, due 4/25/12 Problem 1: The control of a five-cycle multicycle MIPS processor is a finite state machine with 30 states. The instruction set has 96 instructions and contains a six-b
School: Auburn
Course: Electrical Engineering
t: CLkris Trueblood 'Prroon:. Mo.44ket.4 Ca.);ro Deck ; Awn. t, 22, Loos ?rot oeb, je StA. h -c4 s kkaira., au . eiu Sclii tnt c exmci ?Toro, 5-3E9 t s I fri4roamc-Kor el to-4- e.0 11 / lean, 4. t; Id enet01 '4.SQ fl4Qtpan i 44 Anwlec Lear" "-La
School: Auburn
Course: Electrical Engineering
ELEC 2010 Laboratory Manual Experiment 10 PRELAB Your Name Pages of 6 54\ Prelab Questions (10 points) Answer these questions before coming to lab and turn them in when you arrive. You may do your work on separate paper (for example you might want t
School: Auburn
Course: Computer Aided Design Of Digital Circuits
ELEC 5250/6250 COMPUTER-AIDED DESIGN OF DIGITAL LOGIC CIRCUITS (Elective for ELEC, ECPE) 2011 Catalog Data: ELEC 5250/6250. COMPUTER-AIDED DESIGN OF DIGITAL LOGIC CIRCUITS (3) LEC. 3. Pr., ELEC 2220 or COMP 3350. Computer-automated design of digital logic
School: Auburn
Course: Electrical Engineering Laboratory IV
COURSE SYLLABUS ELEC 3040 ELECTRICAL SYSTEM DESIGN LABORATORY ELEC 3050 EMBEDDED SYSTEM DESIGN LABORATORY FALL SEMESTER, 2011 INSTRUCTORS: Victor P. Nelson, Office: Broun 326, Email: nelsovp@auburn.edu John Y. Hung, Office: Broun 227, Email: hungjoh@aubur
School: Auburn
Course: Digital Logic Circuits
ELEC 2200 - DIGITAL LOGIC CIRCUITS SUMMER SEMESTER - 2011 2011 Catalog Data: ELEC 2200. DIGITAL LOGIC CIRCUITS (3). Prereq. COMP 1200 or COMP 1210. Electronic devices and digital circuits; binary numbers; Boolean algebra and switching functions; gates and
School: Auburn
Course: Computer Systems
ELEC 2220 - COMPUTER SYSTEMS Summer 2010 2010 Catalog Data: ELEC 2220. COMPUTER SYSTEMS (3) LEC, 3. Pr., ELEC 2210 or ELEC 2200. Computer hardware and software organization, processor programming models, data representation, assembly language programming,