• 4 Pages syllabussum
    Syllabussum

    School: UNF

    Course: Introduction To Computer Hardware Organization

    CDA 3101 Introduction to Computer Hardware Organization INSTRUCTOR: OFFICE: PHONE: EMAIL: OFFICE HOURS: HOME PAGE: Dr. Sanjay Ahuja 15/3213 620-2985 sahuja@unf.edu Monday, Tuesday: 4.10 pm 4.40 pm or by appointment. http:/www.unf.edu/~sahuja Summer

  • 3 Pages syllabusfall
    Syllabusfall

    School: UNF

    Course: Introduction To Computer Hardware Organization

    CDA 3101 Introduction to Computer Hardware Organization PROFESSOR: OFFICE: PHONE: EMAIL: OFFICE HOURS: HOME PAGE: Dr. Sanjay Ahuja Fall 2007 15/3213 620-1317 sahuja@unf.edu Tuesday: 7.20 pm - 7.30 pm and 8.45 pm - 9.45 pm Thursday: 3 pm - 5.40 pm, 7

  • 1 Page springcourseschedule
    Springcourseschedule

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Course Schedule Assigned Wed, 1/7/09 Wed, 1/14/09 Mon, 1/26/09 Mon, 2/2/09 Wed, 2/11/09 Wed, 2/18/09 Mon, 3/2/09 Wed, 3/11/09 Mon, 3/30/09 Wed, 2/11/09 Wed, 4/1/09 Due Wed, 1/14/09 Mon, 1/26/09 Mon, 2/2/09 Wed, 2/11/09 Wed, 2/18/09 Mon, 3/2/09 Wed, 3

  • 1 Page schedulesum
    Schedulesum

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Tentative Course Schedule Assigned Lab 1 (15 points) Lab 2 (15 points) Lab 3 (20 points) Lab 4 (20 points) Lab 5 (15 points) Lab 6 (15 points) Lab 7 (20 points) Assignment 1 Assignment 2 Midterm Exam Exam #2 Tues, 6/15/04 Tues, 6/22/04 Tues, 6/29/04

  • 1 Page fallcourseschedule
    Fallcourseschedule

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Tentative Course Schedule Lab 1 Lab 2 Lab 3 Lab 4 Lab 5 Lab 6 Lab 7 Lab 8 Lab 9 Assignment 1 Assignment 2 Midterm Exam Exam #2 Assigned Thurs, 8/30/07 Thurs, 9/6/07 Tues, 9/18/07 Tues, 9/25/07 Thurs, 10/4/07 Tues, 10/16/07 Thurs, 10/25/07 Tues, 11/6/

  • 1 Page sn7411
    Sn7411

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Vcc 14 13 12 11 10 9 8 1 2 3 4 5 6 7411: TRIPLE 3-INPUT AND 7 GND

  • 1 Page sn7400
    Sn7400

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Vcc 14 13 12 11 10 9 8 1 2 3 4 5 6 7400: QUAD 2-INPUT NAND 7 GND

  • 6 Pages HW7
    HW7

    School: UNF

    Course: Introduction To Computer Hardware Organization

    CDA 3101: Introduction to Computer Hardware Organization Fall Term, 2005 Suggested exercises: Complete before the final exam 1. Convert the following floating point numbers to their decimal equivalents (IEEE 32 bit format): 0 0 1 0 1 1 0 0 1 1 0 1 0

  • 6 Pages 10_08_Notes
    10_08_Notes

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Page 72 Transitions are made with the clock. External inputs are not required. States are named using flip-flop values. The transition/output table is then Q3 Q2 Q1 Q0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 th

  • 6 Pages 09_22_Notes
    09_22_Notes

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Page 54 The basic SR-latch has no provision for clock input and so is configured for asynchronous usage. Note that since Qnext is a function of S,R,Q we can derive a next state equation as follows: Qnext = f(S,R,Q) = (1,4,5) + d(6,7) from the earlier

  • 1 Page sn7473
    Sn7473

    School: UNF

    Course: Introduction To Computer Hardware Organization

    J(1) 14 Q(1) 13 Q(1) 12 GND 11 K(2) 10 Q(2) 9 Q(2) 8 J Q J Q K CLR Q K CLR (NEGATIVE EDGE TRIGGERED WITH CLEAR) Q 1 2 Clock(1) Clear(1) 3 K(1) 4 Vcc 5 6 Clock(2) Clear(2) 7 J(2) 7473: DUAL JK MASTER-SLAVE FLIP-FLOP

  • 1 Page sn7442
    Sn7442

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Vcc 16 15 A Inputs 14 B 13 C 12 D 11 9 Outputs 10 8 9 7 A = 1, B = 2, C = 4, D = 8 Selected output goes LOW 0 1 2 1 3 2 4 3 5 4 6 5 7 6 8 GND Outputs 7442: 4 TO 10 LINE BCD TO DECIMAL DECODER

  • 1 Page sn74138
    Sn74138

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Vcc 16 15 0 14 1 13 2 Data Outputs 12 3 11 4 10 5 9 6 When enable input G1 is HIGH, a binary input on Select inputs C, B, A turns the corresponding output line LOW (the remaining output lines are HIGH). The output selected is based on C=4, B=2, A=1

  • 1 Page sn74154
    Sn74154

    School: UNF

    Course: Introduction To Computer Hardware Organization

    Vcc 24 23 A Select 22 B 21 C 20 D Enable 19 G2 18 G1 17 15 16 Outputs 15 13 14 12 13 11 14 When enable inputs G2 and G1 are both LOW, a binary input on Select inputs D, C, B, A turns the corresponding output line LOW (the remaining output lines

  • 6 Pages HW7
    HW7

    School: UNF

    Course: Introduction To Computer Hardware Organization

    CDA 3101: Introduction to Computer Hardware Organization Fall Term, 1999 Suggested exercises: Complete before the final exam 1. Convert the following floating point numbers to their decimal equivalents (IEEE 32 bit format): 0 0 1 0 1 1 0 0 1 1 0 1 0

  • 1 Page sn7483
    Sn7483

    School: UNF

    Course: Introduction To Computer Hardware Organization

    B3 16 S3 15 COUT 14 CIN 13 GND 12 B0 11 A0 10 S0 9 Adder A3 B3 CO3 CI3 S3 Adder A2 B2 CO2 CI2 S2 Adder A1 B1 CO1 CI1 S1 Adder A0 B0 CO0 CI0 S0 1 A3 2 S2 3 A2 4 B2 5 Vcc 6 S1 7 B1 8 A1 7483: 4-BIT BINARY FULL ADDER W/FAST CARRY

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