CSC 266 Michigan

Lab #1 = Exp. 1 pgs. 34-37 in the text. Part I. Circuit #1 Input A BC Circuit #1 Output X Y 1) Select one circuit from fig. E1.2; 1a, b, c or d. Note: All labs are individual work. everyone constructs their own circuit. If two people are sharing

CSC 265_LAB #3 - 20 points _ NAME Due Date Oct. 8th Verified By:_ Lab 3: pages 77-79 Digital Design by Peter Burger Design a variable function generator circuit that outputs one of the three Boolean you selected in Lab #2. Truth Table for Lab 2 Fun

CSC 265 Lab 0 Due at end of lab on Wednesday Sep. 105th Name_ Demonstrated to :_ Date: _ 10 points: After one week of the due date all labs are worth 0 points. PART I: Verify experimentally the behavior characteristics of the following logic gates:

CSC 265 Lab #7 - 20 points Due Date: Nov. 19th Sec#_. Name_ Demo/Date: _ Bit Sequence Detector Circuit: Design a circuit to detect the input sequence of 3 consecutive 1\'s on input. The output should be 0 until 3 consecutive 1\'s have been input, th

CSC 265 LAB #8 - 30 points Due Date: Wednesday Dec. 3rd Name:_ Complete Circuit Demo/Date_ For this experiment you will design and build a three-function SERIAL PROCESSING UNIT. Input data will be input serially from Least Significant Bit to Most S

CSC 265 LAB #2- 20 points Points Possible: 20 NAME _ Date & Verified By:_ Due Oct. 1st You are to build a circuit to generate three Boolean functions of two variables. The three groups of functions are listed below, labeled O1, O2 and O3. Select

CSC 265 LAB #4 - 20 points Due Date: Oct. 22nd Lab 2: Truth Table A 0 0 1 1 B 0 1 0 1 O1 O2 O3 NAME _ Demo/Date:_ Functions Implemented O1 = O2 = O3 = This lab entails finding a minimized circuit for the implementation of the variable function gene

CSC 265_LAB #3 - 20 points _ NAME Due Date Oct. 8th Verified By:_ Lab 3: pages 77-79 Digital Design by Peter Burger Design a variable function generator circuit that outputs one of the three Boolean you selected in Lab #2. Truth Table for Lab 2 Fun

CSC 265 LAB #8 - 30 points Due Date: Wednesday Dec. 3rd Name:_ Complete Circuit Demo/Date_ For this experiment you will design and build a three-function SERIAL PROCESSING UNIT. Input data will be input serially from Least Significant Bit to Most S