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Unformatted text preview: W08 EECS 314 Homework 6 Solutions Problem 1 Part 1 The problem asks to find V OUT in terms of V IN , so we start out the problem by doing Node Voltage Analysis. I R and I C are labeled on the diagram and following the Passive Sign Convention, this in turn denotes the polarity of our voltages. KCL @ V I C = I R R V R V V t t V C IN IN C − = − = ∂ ∂ ) ( (1) Equation (1) has a relationship between V IN and V C but we want one between V IN and V OUT so we do a KVL to extract a relationship between V OUT and V C KVL loop going clockwise (ground Æ V + Æ V Æ capacitor Æ V OUT Æ ground) 0V – V C (t) + V OUT (t) = 0 Î V OUT (t) = V C (t) (2) Combining (1) and (2) gives us R t V t t V C IN OUT ) ( ) ( − = ∂ ∂ Move C to the other side, integrate both sides and pull out constants and we get ∫ − = (t)dt V RC 1 (t) V IN OUT K= RC 1 − so when R=25k Ω and C=4nF, K=10kHz Part 2 If V IN (t) is a constant of +20mV, we just use our relationship found earlier to determine V OUT (t) t mV kHz dt mV kHz dt t V RC t V IN OUT ⋅ ⋅ − = ⋅ ⋅ − = − = ∫ ∫ 20 10 20 10 ) ( 1 ) ( 200t (t) V OUT − = UNITS: notice V OUT is in Volts (kHz*mV*s=V) As time increases, the output voltage decreases, thus making V OUT more negative. V OUT will therefore saturate to the negative supply voltage which is 10V. We then solve for when this occurs. 10V = 200 * t Î t=0.05 s Part 3 If the circuit is to be changed so that saturation occurs later at 0.5 s, either R or C can be changed. When we found V OUT (t) after integration, it came out to be t mV RC ⋅ ⋅ − 20 1 If only R is changed, we still saturate at 10V but our prefactor 1/RC changes 10V = s mV nF R NEW 5 . 20 4 1 ⋅ ⋅ − Î This gives us R NEW = 250k Ω If only C is changed, we still saturate at 10V and the prefactor 1/RC changes 10V = s mV C k NEW 5 . 20 25 1 ⋅ ⋅ ⋅ Ω − Î This gives us C NEW = 40nF W08 EECS 314 Homework 6 Solutions Problem 2 Parts 1 & 2 The problem asks to find V OUT in terms of V IN , so we start out the problem by doing Node Voltage Analysis. I R and I C are labeled on the diagram and following the Passive Sign Convention, this in turn denotes the polarity of our voltages. KCL @ V I C + I R = 0 Î I C = I R R V t t V C OUT C − = ∂ ∂ ) ( (1) Equation (1) has a relationship between V OUT and V C but we want one between V IN and V OUT so we do a KVL to extract a relationship between V IN and V C KVL loop going clockwise (ground Æ V IN Æ C Æ V Æ V + Æ ground) V IN (t)+ V C (t) = 0 Î V IN (t) = V C (t) (2) Combining (1) and (2) gives us R t V t t V C OUT IN ) ( ) ( − = ∂ ∂ Move C to the other side, integrate both sides and pull out constants and we get t (t) V RC (t) V IN OUT ∂ ∂ − = K=RC so when R=1k Ω and C=2nF, K=2μs Part 3 A quick way to do this problem is to analyze the circuit in small parts. The circuit is composed of multiple opamp circuits we’ve seen before, so we use the divide and conquer approach to solve the circuit. The right end of the circuit is an inverting summing amplifier whose relationship between...
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 Winter '07
 Ganago
 Frequency, Volt, Lowpass filter, Vout, Alexander Ganago, ___________________________ Discussion section

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