09._Magnitude_Comparator.pdf - Magnitude Comparator By Dr...

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 1
Magnitude Comparator
By
Dr Praveen Kumar ReddyM
School of Information Technology
and Engineering

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 4
Decoder
• The combinational circuit that change the binary information into 2 N output lines is known
as Decoders.
• The binary information is passed in the form of N input lines. The output lines define the 2
N
-
bit code for the binary information.
• In simple words, the Decoder performs the reverse operation of the Encoder . At a time, only
one input line is activated for simplicity. The produced 2
N
-bit output code is equivalent to the
binary information.
❑ Decoder

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 5
2 to 4 line decoder:
• In the 2 to 4 line decoder, there is a total of three inputs, i.e., A
0
, and A
1
and E and
four outputs, i.e., Y
0
, Y
1
, Y
2
, and Y
3
.
• For each combination of inputs, when the enable 'E' is set to 1, one of these four
outputs will be 1. The block diagram and the truth table of the 2 to 4 line decoder are
given below.
• Block Diagram: Truth Table:
❑ Decoder
❑ 2 to 4 line decoder:

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 6
2 to 4 line decoder:
• The logical expression of the term Y0, Y0, Y2, and Y3 is as follows:
Y
3
=E.A
1
.A
0
Y
2
=E.A
1
.A
0
’
Y
1
=E.A
1
'.A
0
Y0=E.A
1
'.A
0
'
• Logical circuit of the above expressions is given below:
❑ Decoder
❑ 2 to 4 line decoder:

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 7
3 to 8 line decoder:
• The 3 to 8 line decoder is also known as Binary to Octal Decoder .
• In a 3 to 8 line decoder, there is a total of eight outputs, i.e., Y
0
, Y
1
, Y
2
, Y
3
, Y
4
, Y
5
, Y
6
,
and Y
7
and three outputs, i.e., A
0
, A1, and A
2
.
• This circuit has an enable input 'E'. Just like 2 to 4 line decoder, when enable 'E' is set
to 1, one of these four outputs will be 1.
• The block diagram and the truth table of the 3 to 8 line encoder are given below.
• Block Diagram: Truth Table:
❑ Decoder
❑ 2 to 4 line decoder:
❑ 3 to 8 line decoder:

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 8
3 to 8 line decoder:
• The logical expression of the term Y
0
, Y
1
, Y
2
, Y
3
, Y
4
, Y
5
, Y
6
, and Y
7
is as follows:
Y
0
=E. A
0
'.A
1
'.A
2
'
Y
1
=E. A
0
.A
1
'.A
2
'
Y
2
=E. A
0
'.A
1
.A
2
'
Y
3
=E. A
0
.A
1
.A
2
'
Y
4
=E. A
0
'.A
1
'.A
2
Y
5
=E. A
0
.A
1
'.A
2
Y
6
=E. A
0
'.A
1
.A
2
Y
7
=E. A
0
.A
1
.A
2
• Logical circuit of the above expressions is:
❑ Decoder
❑ 2 to 4 line decoder:
❑ 3 to 8 line decoder:

Dr. Praveen Kumar Reddy M; School of Information Technology and Engineering 9/8/2021 7:16 AM Slide No. 9
4 to 16 line Decoder
• In the 4 to 16 line decoder, there is a total of 16 outputs, i.e., Y
0
, Y
1
, Y
2
, …… ,
Y
15
and four inputs, i.e., A
0
, A1, A
2
, and A
3
.