Lecture 9 - ECE 2300 Digital Logic Computer Organization...

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Lecture 9: Spring 2014 ECE 2300 Digital Logic & Computer Organization More Finite State Machines 1
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Lecture 9: Announcements Prelim 1 – Thursday, Feb 27, 7:30-9:30pm, Phillips 203 – Closed book, closed notes, closed internet – 2nd review session Tuesday, Feb 25, 7:30pm, Phillips 407 Lab 3 is on CMS – Prelab (A) due Friday, Feb 28 HW 4 will be on CMS tonight – Due Wednesday March 5 Updated TA office hours on Piazza 2
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Lecture 9: Rescheduling Prelim 2 Possible dates: Wednesday, April 16 or April 9 – Please vote on Piazza! – Do not vote only for dates you prefer (please try to be flexible) 3 https://piazza.com/class/hp2p41vygca756?cid=72
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Lecture 9: Student-Led Extensions No student presentation today • Thursday – Yangyi Hao and Weier Mi, “De Morgan” Please email instructor to sign up 4
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Lecture 9: Lecture 8: 5 Procedural Assignments and FFs Y and Z are flip-flops (FFs) in actual hardware FFs are edge sensitive Capture (take snapshot of) inputs at the clock edge New outputs appear after the clock edge reg Y, Z; always @ (posedge clk) begin Y <= A & B; Z <= ~Y; end reg Y, Z; always @ (posedge clk) begin Y = A & B; Z = ~Y; end Simulation behaviors Blocking: assign to LHS immediately Nonblocking: assign to LHS until end of always block
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Lecture 9: FSM: General Form Inputs Outputs Next State ( S *) Current State ( S ) FF FF Combinational Logic CLK 6
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Lecture 9: Moore Machine Outputs depend on current state value Inputs Outputs Next State ( S *) Current State ( S ) FF FF Next State Combinational Logic Output Combinational Logic 7 CLK
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Lecture 9: Mealy Machine Inputs Outputs Next State ( S *) Current State ( S ) FF FF Next State Combinational Logic Output Combinational Logic Outputs depend on input and current state values 8 CLK
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