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lecture3 - Recap ... Representation of information eg...

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Unformatted text preview: Recap ... Representation of information eg numbers, characters, strings. Bit-level manipulations Boolean Algebra. Numeric encodings 2's complement method. Basic operations addition, multiplication etc... How are information and operations simulated in computer hardware ? 1 Overview of Logic Design Fundamental Hardware Requirements Communication How to get values from one place to another Computation Storage Bits are Our Friends Everything expressed in terms of values 0 and 1 Communication Low or high voltage on wire Computation Compute Boolean functions Storage Store bits of information 2 Communication - Digital Signals 0 1 0 Voltage Time Use voltage thresholds to extract discrete values from continuous signal Simplest version: 1-bit signal Either high range (1) or low range (0) With guard range between them Not strongly affected by noise or low quality circuit elements Can make circuits simple, small, and fast 3 Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium II: 7 million Compaq Alpha 21264: 15 million Intel Pentium III: 28 million Logically, each transistor acts as a switch Combined to implement logic functions AND, OR, NOT Combined to build higher-level structures Adder, multiplexer, decoder, register, ... Combined to build processor 4 Simple Switch Circuit Switch open: No current through circuit Light is off Vout is +2.9V Switch closed: Short circuit across switch Current flows Light is on Vout is 0V Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage. 5 N-type MOS Transistor MOS = Metal Oxide Semiconductor two types: N-type and P-type N-type when circuit between #1voltage, short Gate has positive and #2 (switch closed) when Gate has zero voltage, open circuit between #1 and #2 (switch open) Gate = 1 Terminal #2 must be connected to GND (0V). 6 Gate = 0 P-type MOS Transistor P-type is complementary to N-type when Gate has positive voltage, open circuit between #1 and #2 (switch open) when Gate has zero voltage, short circuit between #1 and #2 (switch closed) Gate = 1 Terminal #1 must be connected to +2.9V. 7 Gate = 0 Complementary MOS Complementary devices work in pairs open when voltage at G is low closes when: voltage(G) > voltage (S) + n-channel closed when voltage at G is low opens when: voltage(G) < voltage (S) p-channel 8 Logic Gates Use switch behavior of MOS transistors to implement logical functions : AND, OR, NOT. Digital symbols: recall that we assign a range of analog voltages to each digital (logic) symbol assignment of voltage ranges depends on electrical properties of transistors being used typical values for "1": +5V, +3.3V, +2.9V from now on we'll use +2.9V 9 Logic Gates 10 Logic Gates from Transistors NOT Truth table In 2.9 V 11 Out 0V In 0 1 Out 1 0 0 V 2.9 V Logic Gates from Transistors NOR A 0 0 1 1 12 B 0 1 0 1 C 1 0 0 0 Note: Serial structure on top, parallel on bottom. Combinational Circuits Acyclic Network Primary Inputs Primary Outputs Acyclic Network of Logic Gates Continously responds to changes on primary inputs Primary outputs become (after some delay) Boolean functions of primary inputs 13 Truth Table Shows all possible inputs and outputs of a function. Each input variable is either 1 or 0 A function with n variables has 2n possible combinations of inputs. Inputs are listed in binary order eg from 000 to 111 f(x,y,z) = (x + y')z + x' x 0 0 0 0 1 1 1 1 y 0 0 1 1 0 0 1 1 z 0 1 0 1 0 1 0 1 f(x,y,z) 1 1 1 1 0 1 0 1 14 f(0,0,0) f(0,0,1) f(0,1,0) f(0,1,1) f(1,0,0) f(1,0,1) f(1,1,0) f(1,1,1) = (0 + 1)0 + 1 = (0 + 1)1 + 1 = (0 + 0)0 + 1 = (0 + 0)1 + 1 = (1 + 1)0 + 0 = (1 + 1)1 + 0 = (1 + 0)0 + 0 = (1 + 0)1 + 0 =1 =1 =1 =1 =0 =1 =0 =1 NAND Gate is complete in logic We can build all other 2 input gates with 2 input nands. X = A' A.A = A (Idempotent law) (A.A)' = A' X = A.B; (A')' = A; ((A.B)')' = A.B X = A+B; 15 ((A+B)')' = (A+B); (A'.B')' = A+B (DeMorgan's Law) Boolean fns with Digital Circuits a 0 0 0 0 1 1 1 1 16 b 0 0 1 1 0 0 1 1 c 0 1 0 1 0 1 0 1 f(a,b,c) 0 0 0 1 0 1 1 1 or f(a,b,c) = (a&b) | (b&c) | (a&c) 3 input majority function Boolean fns with digital circuits a 0 0 0 0 1 1 1 1 17 b 0 0 1 1 0 0 1 1 c 0 1 0 1 0 1 0 1 f(a,b,c) 0 1 1 0 1 0 0 1 f(a,b,c) = (a^b)^c Parity function : true iff # inputs that are true is odd XOR is a 2-input Parity function Boolean fns with digital circuits Full Adder = Adds 2 bits and carry-in, produces 1-bit sum and carry-out. Sum = Parity Carry-out = Majority a b 0 0 0 0 0 1 carry Carry sum -in -out 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 1 0 0 0 1 0 1 1 1 s c 0 1 1 0 1 0 1 1 1 1 18 Boolean fns with Digital Circuits Ripple-Carry Adder- Add 2, k-bit numbers. 19 ...
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