Unformatted text preview: Course Code: CS281
Course Title:DIGITAL LOGIC DESIGN
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03 Department of COMPUTER SCIENCE Contents Combination logic circuits and designs
1. COMBINATION CIRCUIT
2. ANALYSIS PROCEDURE
3. DESIGN PROCEDURE
4. BINARY ADDER
5. BINARY SUBTRACTOR
6. PARALLEL ADDER AND SUBTRACTOR
7. BINARY MULTIPLIER
9. BCD ADDER
14. CODE CONVERTER Combinational Circuits
• Combinational circuit is a circuit in which we combine the different gates in the circuit, for
example encoder, decoder, multiplexer and demultiplexer.
Some of the characteristics of combinational circuits are following:
• The output of combinational circuit at any instant of time,
depends only on the levels present at inputterminals.
• The combinational circuit do not use any memory. The previousstate
of input does not have any effect on the present state of the circuit.
• A combinational circuit can have an n number of inputs and m
number of outputs. COMBINATIONAL CIRCUITS
• Block diagram:
possible combinations of input values.
3 • Specific functions :of combinationalcircuits
MSI Circuits and standard cells 4 ANALYSIS PROCEDURE
Analysis procedure 1. To obtain the output Boolean functions from a logic diagram,
proceed as follows:
Label all gate outputs that are a function of input variables with arbitrary symbols.
Determine the Boolean functions for eachgate output. 2. Label the gates that are a function of input variables and previously labeled gates
with other arbitrary symbols. Find the Boolean functions for these gates. 3. Repeat the process outlined in step 2 until the outputs of
the circuit are obtained. DESIGN PROCEDURE
1. The problem is stated
2. The number of available input variables and requiredoutput
variables is determined.
3. The input and output variables are assigned lettersymbols.
4.The truth table that defines the required relationship betweeninputs
and outputs is derived.
5. The simplified Boolean function for each output isobtained.
6. The logic diagram is drawn. BINARY ADDERS
A Half Adder is a combinational circuit with two binary inputs (augends and addend bits and
two binary outputs (sum and carry bits.) It adds the two inputs (A and B) and produces the sum
(S) and the carry (C) bits. Fig 1:Block diagram Fig 2:Truth table Sum=A′B+AB′=A
Carry=AB B BINARY ADDERS
The full-adder adds the bits A and B and the carry from the previous column called the
carry-in Cin and outputs the sum bit S and the carry bit called the carry-out Cout . Fig 3: block diagram Fig 4:Truth table BINARY SUBTRACTORS
A Half-subtractor is a combinational circuit with two inputs A and B
and two outputs difference(d) and barrow(b). Fig 5:Block diagram
b=A′B Fig 6: Truth table
B BINARY SUBTRACTORS
The full subtractor perform subtraction of three input bits: the minuend , subtrahend , and
borrow in and generates two output bits difference and borrow out . Fig 7:Block diagram Fig 8: Truth table PARALLEL ADDER AND SUBTRACTOR
A binary parallel adder is a digital circuit that adds two binary numbers in parallel form
and produces the arithmetic sum of those numbers in parallel form Fig 9:parallel adder Fig 10:parallel subtractor CARRY LOOK-A- HEAD ADDER
• In parallel-adder , the speed with which an addition can be performed is governed
by the time required for the carries to propagate or ripple through all of the stages
of the adder.
• The look-ahead carry adder speeds up the process by eliminating
this ripple carry delay. CARRY LOOK-A- HEAD ADDER Fig:1 blockdiagram 1
3 BINARY MULTIPLIER
A binary multiplier is an electronic circuit used in digital electronics, such as a computer, to
multiply two binary numbers. It is built using binary adders.
Example: (101 x 011)
Partial products are: 101 × 1, 101 × 1, and 101 × 0
1 0 1 1 1 1 0 1 1 0 1 0 0 0 0 1 1 0 0 1 1 14 BINARY MULTIPLIER
• We can also make an n × m “block” multiplier and use that to
form partial products.
• Example: 2 × 2 – The logic equations for each partialproduct binary digit are shown below
• We need to "add" the columns to get the product bits P0,
P1, P2, and P3. BINARY MULTIPLIER
B1 B0 A1 B1 B0 HA HA P3 P2 P1 P0 Fig 1: 2 x 2 multiplierarray 1
6 MAGNITUDE COMPARATOR
Magnitude comparator takes two numbers as input in binary form and determines whether
one number is greater than, less than or equal to the other number.
1-Bit Magnitude Comparator
A comparator used to compare two bits is called a single bit comparator. Fig :1 Block diagram 17 MAGNITUDE COMPARATOR Fig 2:Logic diagram of 1-bit comparator 18 MAGNITUDE COMPARATOR
• 2 Bit magnitude comparator Fig :3 Blockdiagram
Fig :4 Truthtable MAGNITUDE COMPARATOR Fig 5:Logic diagram of 2-bit comparator BCD ADDER
• Perform the addition of two decimal digits in BCD, together with an
input carry from a previousstage.
• When the sum is 9 or less, the sum is in proper BCD form and no correction is needed.
• When the sum of two digits is greater than 9, a correction of 0110 should be added to
that sum, to produce the proper BCD result. This will produce a carry to be added to the
next decimal position. 21 \DECODER
• A binary decoder is a combinational logic circuit that converts binary information from the
n coded inputs to a maximum of 2nunique outputs.
• We have following types of decoders 2x4,3x8,4x16….
2x4 decoder Fig 1: Block diagram Fig 2:Truth table DECODERS
Higher order decoder implementation using lower order.
Ex:4x16 decoder using 3x8 decoders ENCODERS
• An Encoder is a combinational circuit that performs the reverse operation of Decoder.
It has maximum of 2n input lines and ‘n’ output lines.
• It will produce a binary code equivalent to the input, which is active
High. Fig 1:block diagram of 4x2 encoder ENCODERS
Octal to binary
encoder Fig 2:Truth table Fig 3: Logicdiagram 2
A 4 to 2 priority encoder has four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0.
Here, the input, Y3 has the highest priority, whereas the input, Y0 has the
lowestpriority. Fig 4:Truth table
• Multiplexer is a combinational circuit that has maximum of 2 n data inputs, ‘n’ selection lines
and single output line. One of these data inputs will be connected to the output based on
the values of selection lines.
• We have different types of multiplexers 2x1,4x1,8x1,16x1,32x1…… Fig 1: Block diagram Fig 2: Truth table MULTIPLEXERS Fig 3: Logic diagram
• Now, let us implement the higher-order Multiplexer using lower-order Multiplexers. MULTIPLEXERS
• Ex:8x1Multiplexer Fig 3: 8x1 Multiplexerdiagram 29 MULTIPLEXERS
• Implementation of Boolean function using multiplexer
• f(A1 , A2 , A3 ) =Σ(3,5,6,7) implementation using 8x1 mux MULTIPLEXERS
f(A1 , A2 , A3 ) =Σ(3,5,6,7) implementation using 4x1 mux
:2 Fig 1:
Fig 1: Truth
• A demultiplexer is a device that takes a single input line and routes it to one of several
digital output lines.
• A demultiplexer of 2n outputs has n select lines, which are used to select which output
line to send the input.
• We have 1x2,1x4,8x1…. Demultiplexers. Fig:1 Block diagram Fig :2 Truth table DEMULTIPLEXER
Boolean functions for each output as Fig:3 Logic diagram CODE CONVERTERS
A code converter is a logic circuit whose inputs are bit patterns representing numbers (or
character) in one code and whose outputs are the corresponding representation in a
Design of a 4-bit binary to gray code converter Fig :1 Truth table
K-map simplification CODE
CONVERTERS CODE CONVERTERS Fig: 2 Logicdiagram References / Resources DIGITAL DESIGN BY
MORRIS MANO ...
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