ECE2801_C08_bonus_quiz5_sol - the 1284 clock periods that...

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ECE 2801 – Foundations of Embedded Systems Bonus Quiz #5 Name: ___ Solutions ____                                          ECE Box #: __________ 1) In the MSP430F449, what frequencies are the Auxiliary clock (ACLK), the Main  clock (MCLK) and the Sub-main clock (SMCLK) set to by default on RESET?     a) 1.048 MHz,  8 MHz,  8 MHz b) 32,768 Hz, 1.048 MHz, 1.048 MHz     c) 32,768 Hz, 32,768 Hz, 1.048 MHz d) 32,768 Hz, 8 Mhz, 1.048 Mhz 2) Assume the frequency of the clock source for 16-bit TimerB is set to 128.421 KHz.  What count value should TBCCR0 be set to in order to measure 0.01 seconds?  Will the  timer run “fast” or “slow” (0.01 sec ) * 128,421 clock tics/sec ~= 1284 tics The timer will be “fast” because 0.01 seconds actually equals 1284.21 clock periods so 
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Unformatted text preview: the 1284 clock periods that we'll count is slightly less time than 0.01 sec. 3) Describe (or sketch) the operation of a timer in up/down mode. In up/down mode the timer counts up from 0 to its full count (i.e. 0FFFFh for 16 bits) then decrements to count back down to 0. If enabled, interrupt occurs as the counter reached in max count. 4) A certain 8-bit ADC is configured with V ref+ = 3V and V ref- = 0. What would be the output code from this ADC for 1.5V? a) 11110000=F0h b) 00001111=0Fh c) 10000000 = 80h d) 10101010 = Aah 8-bit ADC goes from 0 for 0V to 255 for 3V. 1.5V is half way = 128 = 80h...
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  • Spring '08
  • Jarvis
  • #, 0.01 sec, MHz, clock periods, Systems Bonus Quiz, ___Solutions____                                          ECE Box

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