Unformatted text preview: the 1284 clock periods that we'll count is slightly less time than 0.01 sec. 3) Describe (or sketch) the operation of a timer in up/down mode. In up/down mode the timer counts up from 0 to its full count (i.e. 0FFFFh for 16 bits) then decrements to count back down to 0. If enabled, interrupt occurs as the counter reached in max count. 4) A certain 8-bit ADC is configured with V ref+ = 3V and V ref- = 0. What would be the output code from this ADC for 1.5V? a) 11110000=F0h b) 00001111=0Fh c) 10000000 = 80h d) 10101010 = Aah 8-bit ADC goes from 0 for 0V to 255 for 3V. 1.5V is half way = 128 = 80h...
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- Spring '08
- #, 0.01 sec, MHz, clock periods, Systems Bonus Quiz, ___Solutions____ ECE Box