ENGIN112-F07-08-Decoder and Demux

ENGIN112-F07-08-Decoder and Demux - Truth table for...

Info iconThis preview shows pages 1–5. Sign up to view the full content.

View Full Document Right Arrow Icon
1 Tilman Wolf Department of Electrical and Computer Engineering 10/25/07 ENGIN 112 – Discussions 8 Comparator, Decoder, and Demux Engin112 – 10/25/07 2 Magnitude Comparator ± How big is the truth table for a 4-bit magn. comp.? ± How can it be designed simpler?
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2 Engin112 – 10/25/07 3 Magnitude Comparator Engin112 – 10/25/07 4 Encoder ± How many inputs and outputs does an encoder have (depending on n)? y Inputs: y Outputs: ± Show truth table (n=3):
Background image of page 2
3 Engin112 – 10/25/07 5 Priority Encoder
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 4
Background image of page 5
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Truth table for priority encoder (n=3): Engin112 10/25/07 6 Decoder How many inputs and outputs? y Inputs: y Outputs: Truth table (n=3): 4 Engin112 10/25/07 7 Decoder Design a 3x8 decoder from 2 2x4 decoders with enable input: Engin112 10/25/07 8 Multiplexer How does a multiplexer with 2 select bits work? 5 Engin112 10/25/07 9 Demultiplexer How does a demultiplexer with 2 select bits work?...
View Full Document

Page1 / 5

ENGIN112-F07-08-Decoder and Demux - Truth table for...

This preview shows document pages 1 - 5. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online