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Engin112-F07-L37-PLDs

# Engin112-F07-L37-PLDs - Engin112 Lecture 37 Programmable...

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Maciej Ciesielski Department of Electrical and Computer Engineering 12/07/2007 Engin112 – Lecture 37 Programmable Logic 12/07/2007 Engin 112 - Intro to ECE 2 Recap from last lecture ± Memories y RAM y ROM y Programmable ROM ± Today’s lecture y PLA y PAL y PLDs » Combinational » Sequential y FPGAs » LUT-based

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12/07/2007 Engin 112 - Intro to ECE 3 Combinational PLDs ± Combinational Programmable Logic Device (PLD) y Convenient method for implementing combinatorial logic y Regular structure of AND-OR array ± Three possible implementations: y Programmable ROM (PROM) y Programmable Array Logic (PAL) y Programmable Logic Array (PLA) 12/07/2007 Engin 112 - Intro to ECE 4 Programmable Logic Array (PLA) ± Programmable AND and OR arrays ± AND array generates products ± OR array generates sum of products ± Output XOR allows inversion ± What is the function of this PLA? y F 1 = AB’ + AC + A’BC’ y F 2 = (AC + BC)’ Programmable inverters
12/07/2007 Engin 112 - Intro to ECE 5 Programmable Logic Array (PLA) ± Implement y F1(x,y,z) = Σ (0,3,5,6) = x’y’z’ + x’yz + xy’z + xyz’ y F2(x,y,z) = (0,1,2,4,7) = (3,5,6)‘ = x’y’z’ + x’y’z + x’yz’ + xy’z’ + xyz 0 1 x y z x’y’z’ x’yz xy’z xyz’ F1 F2 0 3 5 6 Programmable inverters 12/07/2007

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Engin112-F07-L37-PLDs - Engin112 Lecture 37 Programmable...

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