ECE231 - 2007 - Final Exam Solutions

ECE231 - 2007 - Final Exam Solutions - ECE23IS —...

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Unformatted text preview: ECE23IS — Introductory Electronics (2007) Final Examination Lecturers — R. Genov, B. Wang, K. Phang Date — Monday, April 16, 2007 Duration: 2 hours 30 minutes 1. Aids: One hand-written, double—sided, letter-sized, aid-sheet and any type calculator is allowed. The device equation sheet is attached at the back and can be removed. 2. You may write in pencil. 3. The marks for each question are indicated within brackets . Place your final answers in the boxes given. 4. Show your work: answers without justification will not receive full marks! 5. Use back sides of sheets if necessary. An extra sheet is provided at the back. Last Name: 50 inflow First Name: Student #: Question 1:[5 marks] For the circuit below, vOUT = 63mV when R1 = 09 , and VOUT = 48mV when R1 = R2//R3 = SOkQ . Find the opamp's input offset voltage, V03, and input bias currents, I 3, assuming zero input offset current (i.e., the two input bias currents are equal). R3 = 300m ..—~ ‘ a M r.» v, v, H s '33 v Vol/arr r- ll + lW/QJ V05 W”? l A Vt» at mV V L3, {93 pmwww; v " 9 “x , __ w )Syy‘l/ m" g mV—~ V05, its“; “‘- WML m gs page 2 of 11 Question 2:[5 marks] On the graph below, draw the DC transfer curves, vX vs. v ,N, and VOUT vs. VIN, marking key points along each curve. Assume the diode voltage drop is 0.7V when the diode is on. IkQ SV ’0; - Wing 3:24 ux :2. Vows-1" 2_ ,gv -: page 3 ofll Question 3:[10 marks] A two-stage amplifier is shown below. The bias voltage at each node is given. Assume W W kn<fl _—_ kp(f] = 2mA/ V2 , th = 2V, and r = 0 for both MOSFETs a) [2 marks] Circle which type of single— stage amplifier is represented by Q1 and Q2: 15V 15V 15V Common-source (Common-git egg «bi-3'“. ommon- ram Q2 : Common-source Common- ate Gammon-diam ‘ . m9“ mmnmmamma.mumm”“‘” ~l T RIN b) [8 marks] vow Draw the small—signal circuit, and find the small-signal gain, v—, input resistance, R IN, and ’Vr.| Si . g output resistance, R 0 UT. l3,” iii-ism a 259%”) ‘ 7: RIM: I/Qms//3M:4ZQJL mail/9 R0th :— ng/Mm 2 LWLUL 9m 2: m Holy-3mm Mm; 44m)! 3% 0W“ 0. 85V 4/523 “Um «’g/S] 4/5]? I —l .3 WMi/V [Sgt‘kq 2 Magma a - 4? L4kn+§éwtx erwmyw‘fl“ fig—rm; :lO-Wfllzlawzj page4of11 “:2” Question 4:[5 marks] Calculate the drain current. Assume pnCox = IOOM/ V2, Vt = 0.5 V, W = 5pm, L = O.18pm,and7» = 0. 1.8V 1D 1: (m M/VLXBERX Mg — I‘lfiQ—Qfif M2. 1.2:) :. {Luzawlef‘ IQ fl~2.l\m$\ m” 035‘qu 6. X < V V023 g y A y ' page 6 ofll Question 5:[5 marks] Design a common base amplifier for a signal delivered by a 509 coaxial cable. The amplifier should have an input resistance, R IN = 509 , to provide a proper termination for the cable, and it should provide an overall small-signal gain, vouf/ vsig, of +50 V/V. The BJT has [3 = 50 and you can ignore the Early effect. Calculate the bias voltage at the output, V0 UT, and the minimum and maximum output voltage for which the B] T remains in the active region. VOUT (max) = S \/ V0UT(mirz.): 0, {3V page 7 of 11 Question 6:[10 marks] A 5V input step is applied to a BJT inverter whose output is connected to a voltage follower. The opamp has a unity—gain frequency of 2MHz and a slew rate of 1:56 V/usec. The BJT has B = 50 and an Early voltage of 100V. ‘ ' gig) 1 r , VOUT a) [4 marks] Calculate the emitter current and collector voltage before and after time t = 0. Before t=0: After t=0: B j 7 Still, mfi‘CN/‘t /\ S V ML F5 v b) [6 marks] ' " 2m am. Plot the output voltage VOUT( t) on the graph below. Mark the time scale and show key points on the waveform. Does slew rate limiting occur (circle one)? _ YES . 9 ‘ ‘ w M . "1’ ti ’7” J mat E: ‘- Q. 3 m ) 0i héggfigv‘ w‘ a Li”: ‘ . m, w;- . Mr ‘3 o t {:0 l page 8 of 11 ...
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This note was uploaded on 04/17/2008 for the course ECE 231 taught by Professor Phang during the Winter '08 term at University of Toronto- Toronto.

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ECE231 - 2007 - Final Exam Solutions - ECE23IS —...

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