ECE231 - 2007 - Term Test 1 Solutions

ECE231 - 2007 - Term Test 1 Solutions - m ECE23IS —...

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Unformatted text preview: m ECE23IS — Introductory Electronics Term Test #1 Lecturers — K. Phang, R. Genov, B. Wang Date - Friday, Feb. 9, 2007 Duration: 50 minutes 1. Answers should be written in pen. Warning: answers written in pencil may be considered ineligible for remarking. 2. The marks for each question are indicated within brackets. Place your final answers in the boxes where given. 3. Show your work: answers without justification will not receive full marks! 4. Use back sides of sheets if necessary. Extra sheets are also provided at the end. 5. Aids: calculator only. (Any calculators including programmable are allowed). Question Last Name: First Name: Student #: Circle your regular tutorial room: BAB024 / BA2145 / 2155 / 2165 / 2175 / 2185 / 2195 page 1 of 7 Last Name: Question 1: [10] Assume the opamps in the circuit shown below are ideal. Determine the voltage V0 and the current 10. page 2 of 7 Last Name: Question 2: [10] The opamp in the circuit shown below has an open loop gain of 80dB and an input offset voltage of +3mV. What is the output voltage V0? 200R )wf fizz/fig ‘ /+ 92 \ 8"" \M : L: - (:11, w + 4. rag/m) VL if: [mmwm ( w 34 (0, «SM-’30 V0 : V05” #45:: EMU Kigryaflfim 0.319) «\f page 3 of 7 <15} ,. l l Last Name: Question 3: [10] The opamp in the inverting configuration shown below has a unity gain frequency of lMHz. The input of the circuit is connected to a sinusoid signal source with an open-circuit peak—to- peak amplitude of 1V and a source resistance of IkQ. (a) Find the peak—to—peak amplitude of the output voltage V0 when the input signal frequency is: (i) SkHz; (ii) SOOkHz. 100m l,ch 9kQ V V0 “tr ' “fiat flea rota ‘ . 1 NJ ll/fspee 4m 2,. J loo/(woiilo if m Iii—re: LII/“fig 3 9L9 garner: lama}, W [22 I ML (3‘ l: )0 as swig <4 fotfiwle 0’; fin] “(to > 9’9" 3': ML" ) ( ny/) I: / 953 ME iij [go/50.3 ’L page 4 of 7 Last Name: (b) For the input signal frequency of SkHz, find the minimum slew rate required to prevent slew—rate limiting. ‘ $ H U\ § 3 y 0% H E in N A} page 5 of 7 Last Name: Question 4: [10] For the circuit shown below, find the current through each diode and the voltages at nodes A and B assuming all diodes are ideal (i.e., VD=OV when conducting). +10V Assume the following I and V notation: ID ——> —{>|- +VD- +5V page 6 of 7 ...
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This note was uploaded on 04/17/2008 for the course ECE 231 taught by Professor Phang during the Winter '08 term at University of Toronto- Toronto.

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ECE231 - 2007 - Term Test 1 Solutions - m ECE23IS —...

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