hmwk6-sols

hmwk6-sols - 120 Exercise 8.2: Solutions Manual -...

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Unformatted text preview: 120 Exercise 8.2: Solutions Manual - Introduction to Digital Design - November 2, 2000 Using the notation given on Figure 8.15 of the textbook we obtain the following network parameters: Combinational Networks' delays: d 1x = d1y = 4 tp (gate) = 2ns d2 = 1 tp (gate) = 0:5ns Network set-up time: t x (net) = ty (net) = tsu (cell) + d1x = 1 + 2 = 3ns su su t Network hold time: Network propagation delay: t h (net) = th (cell) = 0:5ns p (net) = tp (cell) + d2 = 3 + 0:5 = 3:5ns Minimal period: T x y min = max (tin + tsu (net)); (tsu (net)+ tp (cell)); tp(net+ tout )] = max 2+3; 3+3; 3:5+2:5] = 6:0ns Maximal frequency: 1 1 = fmax = T 6:0 10?9 167MHz min Solutions Manual - Introduction to Digital Design - November 2, 2000 Exercise 8.8 129 We need a 3-bit vector to represent the six states and a 2-bit vector to represent the output. Let us de ne the following encoding: y2 y1 y0 000 001 010 011 100 101 State A B C D E F y0 z1 z0 00 01 10 a b c From the state table and the encoding we get the following K-maps. y0 y0 x 0 1 0 1 0 0 0 0 0 0 1 0 y0 1 0 y1 0 0 0 0 y2 x 0 0 1 0 0 1 1 1 1 0 0 0 y0 0 1 y1 1 0 0 1 y2 x 1 1 1 1 0 0 0 0 0 0 y1 1 1 y2 Y2 : Y1 : Y0 : x 0 1 1 1 0 1 y1 y2 x 0 0 0 0 1 0 y1 y2 z1 : z0 : The corresponding switching expressions are 0 Y0 = y0 0 0 0 0 0 0 Y1 = x y2 y1 y0 + x y1 y0 + xy2 y0 + xy1 y0 0y2 y 0 + x0 y1 y0 + xy2 y0 + xy 0 y 0 y 0 Y2 = x 0 2 1 0 z1 = y2 y0 + xy0 0 0 0 z0 = x y1 y0 + y2 y0 + xy0 The sequential network is shown in Figure 8.8 on page 130. 130 x' y2 y0' x' y1 y0 x y2 y0 x y2' y1' y0' x' y2' y1' y0 x' y1 y0' x y2 y0' x y1 y0 Solutions Manual - Introduction to Digital Design - November 2, 2000 Y2 Y1 Y0 y0' y2 y2' y1 y1' y0 y0' CK y2 y0 x y0 x' y1 y0 y2 y0' x y0' z1 z0 Figure 8.8: Sequential network for Exercise 8.8 Solutions Manual - Introduction to Digital Design - November 2, 2000 Exercise 8.16 143 From the network we obtain the following table, based on the expressions below: J A = KA = xQB J = KB = x PS Input Input QA QB x = 0 x = 1 x = 0 x = 1 00 0000 0011 00 01 0000 1111 01 10 01 10 0000 0011 10 11 0000 1111 11 00 11 JA KA JB KB NS The outputs are expressed as: z3 = QA QB 0 z2 = QA QB 0 z1 = QA QB 0 0 z0 = QA QB Giving the following names to the states: State Name Code S0 00 01 S1 S2 10 11 S3 we get the transition table: PS Input Output QA QB x = 0 x = 1 S0 S0 S1 0 S1 S1 S2 1 S2 S3 2 S2 S3 S0 3 S3 NS The state diagram for the given network is presented in Figure 8.20, and corresponds to a modulo-4 counter with decoded output. B 144 Solutions Manual - Introduction to Digital Design - November 2, 2000 0 1 0 S0/0 S1/1 1 1 S3/3 1 S2/2 0 0 Figure 8.20: State diagram for Exercise 8.16 Exercise 8.17 The expression for the ip- op inputs are J A = xQC J B = Q0A J C C = xQB = x0 Q0B K 0 A = xQB K B = QA K From the characteristic expressions of the J K ip- op we get the following expressions for the transition functions: A (t + 1) QB (t + 1) QC (t + 1) Q z = = = = A (t)(x0 + QB (t)) + xQ0A (t)QC (t) 0 0 0 QB (t)QA (t) + QB (t)QA (t) 0 QC (t)(QB (t) + x) + QC (t)xQB (t) 0 QC (t) Q The corresponding transition table is Q Input =0 x = 1 A B C 000 00,10,01 01,10,00 001 00,10,01 11,10,00 00,10,00 00,10,10 010 00,10,00 10,10,10 011 100 00,01,01 01,01,00 00,01,01 11,01,00 101 00,01,00 00,01,10 110 111 00,01,00 10,01,10 PS Q Q x J x A KA ; JB KB ; JC KC Input Output =0 x=1 z 010 010 1 010 111 0 010 011 1 011 111 0 100 000 1 100 001 0 100 101 1 101 101 0 NS To get a high-level description we de ne the following code: 150 Exercise 8.20 Solutions Manual - Introduction to Digital Design - November 2, 2000 The expressions for the ip- op inputs are: A TB T = = Q A + QB 0 QA + QB The transition table is FF inputs PS QA (t)QB (t) TA (t)TB (t) 00 01 11 01 10 10 11 11 Let us de ne the following encoding: Q NS QA (t + 1)QB (t + 1) 01 10 00 00 A QB 00 01 10 11 S0 S1 S2 S3 The resulting state table is PS NS S0 S1 S2 S3 S1 S2 S0 S0 The state diagram is shown in Figure 8.24. The network implements an autonomous modulo-3 counter. S0 S1 S2 S3 Figure 8.24: State diagram for Exercise 8.20 Solutions Manual - Introduction to Digital Design - November 2, 2000 Exercise 8.26 159 The state corresponds to the count. That is, s t ( + 1) = (s(t) + 1) mod 3 Using a radix-2 representation for the count we get the following state table Input PS x = 0 x = 1 Q2 Q1 00 00 01 01 01 10 10 00 10 NS Since the excitation function of a S R ip- op is PS NS 0 1 0 0- 10 1 01 -0 SR we get the following switching expressions S2 = xQ1 S1 = xQ02 Q01 = xQ2 R1 = xQ1 The output is obtained directly from the state register. The sequential network is shown in Figure 8.30. R2 Q2 S CK CK R x Q1 S CK CK R Q' Q1' Q Q' Q2' Q Figure 8.30: Network for Exercise 8.26 ...
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