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Exercise 9.22 Solutions Manual  Introduction to Digital Design  November 15, 2000 Considering the network formed by the decoder and the multiplexer we have that ( 1 if (w; d; e) = (f; g; h) z = 0 otherwise (9:6) where w is the output of the rst multiplexer. An expression for this output is:
w = a b c + bc + abc = ab + bc + a b c
0 0 0 0 0 0 The gate network that implements the network in Figure 9.38 of the textbook is shown in Figure 9.22. The equality comparator that generates z is implemented using XOR and NOR gates (as proposed in the hint). The gate network to generate w is implemented with AND and OR gates.
a b b c' a' b' c w f d g e h z Figure 9.22: Network for Exercise 9.22 206
Exercise 10.10: Solutions Manual  Introduction to Digital Design  November 15, 2000 considering radix r = 2 case (a)  two's complement, n = 7 bits; C = 27 case (b)  one's complement, n = 8 bits; C = 28 ? 1 case (c)  two's complement, n = 5 bits; C = 25 case (d)  two's complement, n = 8 bits; C = 28 (a) (b) (c) (d) Signed Integer  x Representation  xR Bit vector (in decimal) (in decimal) 37 91 1011011 50 205 11001101 5 27 11011 9 9 00001001 We present now the calculations performed to obtain the numbers for the rst row (a). These numbers can be obtained in two di erent ways: using expressions or manipulating the vector of digits (or bits, if r = 2). Using the expression for x < 0, we know that: j j= ?
x C x R = 27 ? xR = 37 So, . x R = 27 ? 37 = 128 ? 37 = 91 The vector of bits is easily obtained from this number in base 10. Another way is to manipulated the vector of digits. As we know, for two's complement number system, the representation of a number with a di erent sign is obtained complementing all digits with respect to (r ? 1) (the greatest digit) and adding one. First we get the representation for jxj: j j = (37)10 = 0100101
x note that the number was represented using n = 7 bits. + Where 1011011 = (91)10 = xR . 1011010 1 1011011 (10:1) 228 Solutions Manual  Introduction to Digital Design  November 15, 2000 Exercise 11.10: The solution for this exercise is shown in Figure 11.13. The network computes the next state adding one to the present state value when the value is less than 9, or adding 7 to the present state when it reaches 9 (forcing the counter to go back to state 0). Using highlevel speci cation we have: ( s(t if s(t) < 9 s(t) = (s())+ 17) mod 16 = 0 if s(t) = 9 t+ CK Register 0 1 Binary ADDER 0 Figure 11.13: BCD counter  Exercise 11.10 ...
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This homework help was uploaded on 04/17/2008 for the course CS 151A taught by Professor Miloseragovich during the Fall '07 term at UCLA.
 Fall '07
 MilosEragovich

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