ece3803_d2008_hw1_solutions

ece3803_d2008_hw1_solutions - ECE 3803 D2008 Homework 1 ECE...

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ECE 3803 D2008 Homework 1 1 ECE 3803 D2008: Microprocessor System Design Homework 1 solutions ARM Architecture: data processing instructions 1. [20 pts] Implement each of the following pseudo-C statements as a single ARM instruction. The “variables” are general purpose ARM registers, assumed 32-bit unsigned integers in the C statements. a) r3 = 48 – r2; rsb r3,r2,#48 b) r1 = r7 & !(r0 bic r1,r7,r0,lsl #4 c) r2 = !(r1 >> r10); mvn r2,r1,lsr r10 d) r5 += r1 * r8; mla r5,r1,r8,r5 ARM Architecture: data transfer instructions 2. [20 pts] Implement the following pseudo-code in ARM assembly. Note: mem 32 [addr] = 32-bit word in memory starting at address addr . a) r3 = mem 32 [r0 + (r4 << 2)]; // use a single ARM instruction ldr r3,[r0,r4,lsl #2] b) mem 32 [r1 += 4] = r6; // use a single ARM instruction str r6,[r1,#4]! c) r5 = mem 32 [r8]; r8 += r1; // use a single ARM instruction ldr r5,[r8],r1 d) Load the first 4 elements of an array of 32-bit integers starting at memory address 0x000000A8 into the ARM registers r4 , r5 , r6 , and r7 , respectively. Use only two ARM instructions. mov r0,#0xA8 ldmia r0,{r4-r7}
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ECE 3803 D2008 Homework 1 2 ARM Architecture: flags, conditional execution, control flow instructions 3. [15 pts] The following code uses branch instructions to implement an if-then-else clause. movs r2,r2,lsr #1 bcs else1 then1 str r4,[r0] mov r1,#0 b done1 else1 add r0,r0,#4 mov r1,r3 done1 a) [5 pts] Describe the condition for executing the “ then1 ” clause in terms of the contents of register r2 at the start of the program. The “
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This note was uploaded on 04/17/2008 for the course ECE 3803 taught by Professor Bogdanov during the Spring '08 term at WPI.

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ece3803_d2008_hw1_solutions - ECE 3803 D2008 Homework 1 ECE...

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