ece475-l14 - 1 ECE 475/CS 416 Computer Architecture-...

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Unformatted text preview: 1 ECE 475/CS 416 Computer Architecture- Speculative Execution II Edward Suh C omputer S ystems L aboratory suh@csl.cornell.edu ECE 475/CS 416 Computer Architecture, Fall 2007 Prof. Suh Announcements No class on Thursday No office hour 11-12 HW2 re-grade request till 23rd 2 ECE 475/CS 416 Computer Architecture, Fall 2007 Prof. Suh Review: ROB Reservation stations (RS): buffer op and operands once issued until executed track assigned ROB entry ROB provide renaming mechanism (tag results with ROB entry instead of RS) hold instructions relevant state from issue to commit, including result if any ECE 475/CS 416 Computer Architecture, Fall 2007 Prof. Suh Speculative Execution with IW Basic Operation: Enter op and tag or data (if known) for each source Replace tag with data as it becomes available Issue instruction when all sources are available Save dest data when operation finishes Commit saved dest data when instruction commits Register File Reorder buffer Load Unit FU FU FU Store Unit < t, result > Ins# use exec op p1 src1 p2 src2 pd dest d ata Commit Rename Table R1 t i t j R2 tag valid bit t 1 t 2 . . t n 0 X X add X 1 X 2 X R4 4 8 X ld X 256 R3 R1 1 R2 2 R3 3 : Next to commit Next available : : R3 R4 t 2 t 1 1 1 Register File Reorder buffer Load Unit FU FU FU Store Unit < t, result > Ins# use exec op p1 src1 p2 src2 pd dest d ata Ins# use exec op p1 src1 p2 src2 pd dest d ata Commit Rename Table R1 t i t j R2 tag valid bit t 1 t 2 . . t n 0 X X add X 1 X 2 X R4 4 8 X ld X 256 R3 R1 1 R2 2 R3 3 : Next to commit Next available : : R3 R4 t 2 t 1 1 1 3 ECE 475/CS 416 Computer Architecture, Fall 2007 Prof. Suh Unified Physical Register File (MIPS R10K, Alpha 21264, Pentium 4) One regfile for both committed and speculative values (no data in ROB/IW) During decode, instruction result allocated new physical register, source regs translated to physical regs through rename table Instruction reads data from regfile at start of execute (no data in RS/IW) Write-back updates reg. busy bits on instructions in ROB/IW (assoc. search) Rename Table r 1 t i r 2 t j FU FU Store Unit < t, result > FU Load Unit FU t 1 t 2 . t n Reg File (ROB/IW not shown) ECE 475/CS 416 Computer Architecture, Fall 2007 Prof. Suh Lifetime of Physical Registers Physical regfile holds both committed and speculative values ld r1, (r3) add r3, r1, #4 sub r6, r7, r9 add r3, r3, r6 ld r6, (r1) add r6, r6, r3 st r6, (r1) ld r6, (r11) ld P1, (P x ) add P2, P1, #4 sub P3, P y , P z add P4, P2, P3...
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This note was uploaded on 02/19/2008 for the course ECE 4750 taught by Professor Suh during the Fall '07 term at Cornell University (Engineering School).

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ece475-l14 - 1 ECE 475/CS 416 Computer Architecture-...

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