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# hw24_SLN - ECE 211 HW 24 SOLUTIONS p 1 of 13...

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ECE 211 HW 24 SOLUTIONS p 1 of 13 //home/vdimitrov/7964/81d814929ca612ea300f05bcb1c5384a542eefc2.doc HW 24 SOLUTIONS 1. (a) Determine the range of integers that can be represented using 8-bit Sign and Magnitude notation. (b) Determine the integer that is represented by the 8-bit Sign and Magnitude notation. 1 1 1 0 1 0 1 0 (c) Find the 8-bit Sign and Magnitude representation for the integer – 49 . Solution: (a) The largest integer is represented by 0 1 1 1 1 1 1 1; the integer is 1 + 2 + 4 + 8 + 16 + 32 + 64 = + 127 The smallest (most negative) integer is represented by 1 1 1 1 1 1 1 1; the integer is – 127 . (b) The magnitude is: 64 32 16 8 4 2 1 1 1 0 1 0 1 0 = 64 + 32 + 8 + 2 = 106 Therefore 1 1 1 0 1 0 1 0 – 106 (c) 1. Represent + 49 using 7 bits: 49 = 32 + 16 + 1 0 1 1 0 0 0 1 2. Append the sign bit: – 49 1 0 1 1 0 0 0 1

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ECE 211 HW 24 SOLUTIONS p 2 of 13 2. Design a combinational circuit (with logic gates) to convert a 4-bit Ones' Complement representation to a Sign and Magnitude representation for the same integer. Input: x3 x2 x1 x0 The Ones' Complement representation of integer N; x3 is the sign bit. Outputs: z3 z2 z1 z0 The Sign and Magnitude representation of the same integer N; z3 is the sign bit. Assertion Levels: The inputs are active-Low, the outputs are active-High. Solution: The sign bit is unchanged. For the other bits: If sign bit = 0, no change; if sign bit = 1, complement. z3 = x3 z2 = x3 x2 z1 = x3 x1 z0 = x3 x0 [This logic is identical to that for conversion from Sign and Magnitude to Ones' Complement.] Circuit realization for active-Low inputs, active-High outputs:
ECE 211 HW 24 SOLUTIONS p 3 of 13 3. A Mealy circuit converts a 4-bit Sign and Magnitude representation into a Ones' Complement representation: Input: x Outputs: z Operation: The circuit processes the input in non-overlapping 4-bit blocks. Each 4 bits are interpreted as a Sign and Magnitude representation of the integer N. The sign bit arrives first. The output is the Ones' Complement representation of the same integer N. The sign bit is outputted first. An input-output example is: x = 0 0 1 1 1 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 z = 0 0 1 1 1 1 0 0 1 0 0 0 1 1 1 1 0 0 0 0 Construct a State Transition Diagram for this circuit. Solution: If the first bit received (the sign bit) is 0, then don't change the next three bits. If the first bit received is 1, then complement the next three bits. The first output bit has the same value as the first input bit (output sign bit = input sign bit ).

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ECE 211 HW 24 SOLUTIONS p 4 of 13 4. A combinational circuit computes the absolute value of a signed integer represented using Ones' Complement notation: Input: x3 x2 x1 x0 The Ones' Complement representation of integer N; x3 is the sign bit. Outputs:
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hw24_SLN - ECE 211 HW 24 SOLUTIONS p 1 of 13...

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