hw13_SLN - ECE 211 HW 13 SOLUTIONS p 1/9...

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ECE 211 HW 13 SOLUTIONS p 1/9 //home/vdimitrov/4372/2c5712bf787fbbb5df00958d1614c4c8b51d64f6.doc HW Set 13 – SOLUTIONS 1. For the S, R waveforms shown, neatly construct the Q waveform. The latch is initially in the set state. Solution: 2. For the S, R waveforms shown, neatly construct the Q waveform. The latch is initially in the reset state. Note that S and R are active-Low. Solution:
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ECE 211 HW 13 SOLUTIONS p 2/9 3. The S, R waveforms shown are periodic; each has a period of 100 ms. Neatly construct the Q waveform and determine its period and frequency. Solution: The period of Q is 100 ms. The frequency = 1/100 ms = 0.01 KHz = 10 Hz.
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ECE 211 HW 13 SOLUTIONS p 3/9 4. If a Set or Reset pulse is too narrow, the latch will not respond to. How narrow is too narrow? (What is the minimum Set pulse width that will set the latch?) Assume each logic gate has a propagation delay of t p . [Refer to the lecture, slide number 13 The Timing Diagram . . . Continued. Determine the delay from the time when R becomes 1 to the time when Q' becomes 1. This is the minimum pulse width for R, because once Q ' = 1, R can become 0 without any change in Q ' or Q. The minimum pulse width for S is the same.] Solution: In the timing diagram below: 1. When R becomes 1, Q becomes 0 after t
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hw13_SLN - ECE 211 HW 13 SOLUTIONS p 1/9...

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