h07_hw2 - EE214 Winter 04/05 B. Murmann Handout #7 Page 1...

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EE214 Winter 04/05 Handout #7 B. Murmann Page 1 of 2 HOMEWORK #2 (Due: Monday, October 11, 2004, noon PT) 1. Use Spice to simulate g m /I D vs. V OV , (e.g. as shown on slides 3 and 4 of lecture 4). a) Generate a plot of g m /I D for EE214 NMOS devices with L=0.35 µ m and L=0.7 µ m in one diagram from V OV = 0V to 300 mV. b) Repeat part (a) for PMOS devices, also using the above two channel lengths. c) Measure (e.g. using graphically in AWaves) and tabulate selected g m /I D values using the table below Simulated g m /I D Long Channel Estimate % Error NMOS, L=0.35 µ m, V OV =50mV NMOS, L=0.7 µ m, V OV =50mV NMOS, L=0.35 µ m, V OV =250mV NMOS, L=0.7 µ m, V OV =250mV PMOS, L=0.35 µ m, V OV =50mV PMOS, L=0.7 µ m, V OV =50mV PMOS, L=0.35 µ m, V OV =250mV PMOS, L=0.7 µ m, V OV =250mV 2. Text, Problem 1.19 3. Show that the effective forward active compound transconductance of the velocity saturated transistor model in Figure 1.41 of the text is given by SX m m m R g g G + = 1 , where g
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This note was uploaded on 04/17/2008 for the course EE 214 taught by Professor Murmann,b during the Fall '04 term at Stanford.

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h07_hw2 - EE214 Winter 04/05 B. Murmann Handout #7 Page 1...

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