asmdescri - ALGORITHMIC STATE MACHINE DESCRIPTIONS FOR...

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ALGORITHMIC STATE MACHINE DESCRIPTIONS FOR DIGITAL SYSTEM DESIGN DIGITAL SYSTEMS I (EEC180A) G. Robert Redinbo A systematic digital system design procedure that combines control flow and hardware resources interactions with time synchronization is presented. This method has been given several names including "digital hardware algorithms", but the common current one is "Algorithmic State Machine Charts". This approach involves more than just the sequential machine aspects of a problem. The data processing function of the system is integrated with the hardware resources for the processing. Most digital systems can be divided into two interacting subassemblies, as shown in Figure 1: the control section and the data processing section. The data processing portion represents the actual work performed by the system such as adding the contents of two registers and placing the results in a third register, shifting a bit pattern around in a register, putting data on a bus for external use or computing data from a bus and placing it in a register. The digital resources in this section are characterized by parallel paths and multiple copies of simple logic functions, e.g., registers, buses, adders, multipliers, and memory blocks. This section represents the largest amount of hardware and space. When an architecture view of a system is given, these are the items that are depicted. The control section, on the other hand, issues all the activating signals for the hardware resources in the data section. Examples of such signals include the add/subtractor selector on a parallel adder module or the gate inputs on a bank of flip-flops which cause a load to this register. The signals are initiated at the proper times and in the proper sequence so as to implement the data processing function. The control section stores and executes a "hardware" program to cause useful work to be performed by the data section resources. The control section behaves fundamentally as a sequential machine that follows the stored program flow. The flow executed by the control section is alterable by external information and by data values residing in the data section. For example, if subtracting two data numbers yields zero, the processing flow takes one branch as opposed to
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2 GENERAL DIGITAL SYSTEM DICHOTOMY Figure 1 Common Clock Status Signals Control Signals EXTERNAL Inputs Outputs DATA SECTION CONTROL SECTION DATA INPUTS DATA OUTPUTS
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3 another if it is nonzero. Thus status signals from the data section return to the control section. External signals may also be required to alter the processing flow. An Algorithmic State Machine description combines the features of program flow with detailed data manipulation expressions to completely define the action of the overall system. The specific hardware attributes in the data section must be known including the role of timing on clocked elements. The Algorithmic State Machine (ASM) chart displays all of this information. The concept of system state is the most important feature in the chart.
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asmdescri - ALGORITHMIC STATE MACHINE DESCRIPTIONS FOR...

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