# lecture 5 - Chapter 3 Arithmetic for Computers Arithmetic...

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Chapter 3 Arithmetic for Computers

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Chapter 3 — Arithmetic for Computers — Arithmetic for Computers n Operations on integers n Addition and subtraction n Multiplication and division n Dealing with overflow n Floating-point real numbers n Representation and operations
Chapter 3 — Arithmetic for Computers — Integer Addition n Example: 7 + 6 n Overflow if result out of range n Adding +ve and –ve operands, no overflow n Adding two +ve operands n Overflow if result sign is 1 n Adding two –ve operands n Overflow if result sign is 0

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Chapter 3 — Arithmetic for Computers — Integer Subtraction n Add negation of second operand n Example: 7 – 6 = 7 + (–6) +7: 0000 0000 0000 0111 –6: 1111 1111 1111 1010 +1: 0000 0000 0000 0001 n Overflow if result out of range n Subtracting two +ve or two –ve operands, no overflow n Subtracting +ve from –ve operand n Overflow if result sign is 0 n Subtracting –ve from +ve operand n Overflow if result sign is 1
Chapter 3 — Arithmetic for Computers — Dealing with Overflow n Some languages (e.g., C) ignore overflow n Use MIPS addu , addui , subu instructions n Other languages (e.g., Ada, Fortran) require raising an exception n Use MIPS add , addi , sub instructions n On overflow, invoke exception handler n Save PC in exception program counter (EPC) register n Jump to predefined handler address n mfc0 (move from coprocessor reg) instruction can retrieve EPC value, to return after corrective action

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Chapter 3 — Arithmetic for Computers — Arithmetic for Multimedia n Graphics and media processing operates on vectors of 8-bit and 16-bit data n Use 64-bit adder, with partitioned carry chain n Operate on 8 × 8-bit, 4 × 16-bit, or 2 × 32-bit vectors n SIMD (single-instruction, multiple-data) n Saturating operations n On overflow, result is largest representable value n c.f. 2s-complement modulo arithmetic n E.g., clipping in audio, saturation in video
Chapter 3 — Arithmetic for Computers — Multiplication n Start with long-multiplication approach 1000 × 1001 1000 0000 0000 1000 1001000 Length of product is the sum of operand lengths multiplicand multiplier product

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Chapter 3 — Arithmetic for Computers — Multiplication Hardware Initially 0
Chapter 3 — Arithmetic for Computers — Optimized Multiplier n Perform steps in parallel: add/shift n One cycle per partial-product addition n That’s ok, if frequency of multiplications is low

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Chapter 3 — Arithmetic for Computers — 1 Faster Multiplier n Uses multiple adders n Cost/performance tradeoff n Can be pipelined n Several multiplication performed in parallel
Chapter 3 — Arithmetic for Computers — 1 MIPS Multiplication n Two 32-bit registers for product n HI: most-significant 32 bits n LO: least-significant 32-bits n Instructions n mult rs, rt / multu rs, rt n 64-bit product in HI/LO n mfhi rd / mflo rd n Move from HI/LO to rd n Can test HI value to see if product overflows 32 bits n mul rd, rs, rt n Least-significant 32 bits of product –> rd

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