454Lec03_Fab2

454Lec03_Fab2 - ECEN 454 Digital Integrated Circuit Design...

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ECEN 454 Lecture 3 1 ECEN 454 Digital Integrated Circuit Design Lecture 3 IC Fabrication II
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ECEN 454 Lecture 3 2 CMOS N-Well Process Fabricate both nMOS and pMOS transistors nMOS transistors reside on the p-type silicon substrate pMOS transistors are fabricated in n-type wells on the same substrate
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ECEN 454 Lecture 3 3 CMOS Process Flow
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ECEN 454 Lecture 3 4 CMOS Process (1) Form the n-well using ion implantation or diffusion Define active regions
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ECEN 454 Lecture 3 5 CMOS Process (2) Implant channel-stop Grow field oxide (LOCOS)
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ECEN 454 Lecture 3 6 CMOS Process (3.1) Define poly gates Form n+ diffusion regions and n-well contacts
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ECEN 454 Lecture 3 7 CMOS Process (3.2) More complex “drain engineering” ± Lightly doped drain structure (LDD) ± Used to reduce hot carrier effects ± Not employed for pMOS
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ECEN 454 Lecture 3 8 CMOS Process (4) Form p+ diffusion regions and p-substrate contacts After SiO 2 deposition, etch contact cuts
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ECEN 454 Lecture 3 9 CMOS Process (5) Subsequent metallization (multiple layers) Finally passivate the wafer
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ECEN 454 Lecture 3 10 3D View of CMOS Inverter (1) Adopted from W. Maly, Atlas of IC Technologies .
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ECEN 454 Lecture 3 11 3D View of CMOS Inverter (2) Adopted from W. Maly, Atlas of IC Technologies .
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ECEN 454 Lecture 3 12 3D View of CMOS Inverter (3) Adopted from W. Maly, Atlas of IC Technologies .
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ECEN 454 Lecture 3 13 3D View of CMOS Inverter (4) Adopted from W. Maly, Atlas of IC Technologies .
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ECEN 454 Lecture 3 14 3D View of CMOS Inverter (5) Adopted from W. Maly, Atlas of IC Technologies .
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ECEN 454 Lecture 3 15 Inverter Mask Layout
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454Lec03_Fab2 - ECEN 454 Digital Integrated Circuit Design...

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