454Fall07HW1 - section view should include at least the gate source and drain of both the NMOS and the PMOS transistor Please label all important

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ECEN 454 Digital Integrated Circuit Design Fall 2007 Homework 1 Due on September 14, Friday 1. (5 points) A large-scale fast prototyping system has been produced by using a very large array of field programmable logic arrays (FPGAs). a. Discuss the pros (features) and cons (weaknesses) of such prototyping systems for proof of design concepts and verification in view of effort and speed performance of the design. b. How would you compare the hardware prototyping method with computer simulation method? 2. (5 points) Please draw a cross-section view of p-well CMOS inverter. This cross-
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Unformatted text preview: section view should include at least the gate, source and drain of both the NMOS and the PMOS transistor. Please label all important components in the figure. 3. (5 points) Please discuss the impact to circuit performance if the CMP (Chemical-Mechanical Polishing) is not performed well. 4. (5 points) Please draw the photo-masks of diffusions and poly for a CMOS inverter using a. positive photo-resist b. negative photo-resist Please make sure that the diffusions and poly can be well-aligned....
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This note was uploaded on 04/17/2008 for the course ELEN 454 taught by Professor Jianghu during the Spring '08 term at Texas A&M.

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