454Lec10_Wire

454Lec10_Wire - ECEN 454 Lecture 10 1 ECEN 454 Digital...

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Unformatted text preview: ECEN 454 Lecture 10 1 ECEN 454 Digital Integrated Circuit Design Lecture 10 Interconnect & Power Model ECEN 454 Lecture 10 2 Interconnects ECEN 454 Lecture 10 3 Interconnect Delay ECEN 454 Lecture 10 4 Impact of Interconnect Parasitics Interconnect parasitics ¡ Affect delay and power consumption ¡ Reliability issues Parasitics effects ¡ Capacitive ¡ Resistive ¡ Inductive ECEN 454 Lecture 10 5 Capacitance of Interconnect V DD V DD V in V out M 1 M 2 M 3 M 4 C db 2 C db 1 C gd 12 C w C g 4 C g 3 V out 2 Fanout Interconnect V out V in C L Simplified Model ECEN 454 Lecture 10 6 Interconnect Models Most accurate models capture resistive, capacitive and inductive effects ¡ Can also include capacitive and inductive couplings ECEN 454 Lecture 10 7 RC delays should only be considered: ¡ when t pRC >> t pgate of the driving gate Lcrit >> √ t pgate /0.38rc When the rise (fall) time at the line input is smaller than RC ( rise (fall) time of the line ) t rise < RC ¡ Otherwise the change in the signal is slower than the propagation delay of the wire When to Use RC Models ECEN 454 Lecture 10...
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454Lec10_Wire - ECEN 454 Lecture 10 1 ECEN 454 Digital...

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